From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: <alejandro.lucero-palau@amd.com>
Cc: <linux-cxl@vger.kernel.org>, <netdev@vger.kernel.org>,
<dan.j.williams@intel.com>, <martin.habets@xilinx.com>,
<edward.cree@amd.com>, <davem@davemloft.net>, <kuba@kernel.org>,
<pabeni@redhat.com>, <edumazet@google.com>,
<dave.jiang@intel.com>, Alejandro Lucero <alucerop@amd.com>
Subject: Re: [PATCH v8 04/27] cxl/pci: add check for validating capabilities
Date: Tue, 24 Dec 2024 17:15:33 +0000 [thread overview]
Message-ID: <20241224171533.000055b4@huawei.com> (raw)
In-Reply-To: <20241216161042.42108-5-alejandro.lucero-palau@amd.com>
On Mon, 16 Dec 2024 16:10:19 +0000
alejandro.lucero-palau@amd.com wrote:
> From: Alejandro Lucero <alucerop@amd.com>
>
> During CXL device initialization supported capabilities by the device
> are discovered. Type3 and Type2 devices have different mandatory
> capabilities and a Type2 expects a specific set including optional
> capabilities.
>
> Add a function for checking expected capabilities against those found
> during initialization and allow those mandatory/expected capabilities to
> be a subset of the capabilities found.
>
> Rely on this function for validating capabilities instead of when CXL
> regs are probed.
>
> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
> Reviewed-by: Zhi Wang <zhiw@nvidia.com>
Some follow on comments in how to handle bitmaps.
Jonathan
> diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
> index dbc1cd9bec09..1fcc53df1217 100644
> --- a/drivers/cxl/pci.c
> +++ b/drivers/cxl/pci.c
> @@ -903,6 +903,8 @@ __ATTRIBUTE_GROUPS(cxl_rcd);
> static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> {
> struct pci_host_bridge *host_bridge = pci_find_host_bridge(pdev->bus);
> + DECLARE_BITMAP(expected, CXL_MAX_CAPS);
> + DECLARE_BITMAP(found, CXL_MAX_CAPS);
> struct cxl_memdev_state *mds;
> struct cxl_dev_state *cxlds;
> struct cxl_register_map map;
> @@ -964,6 +966,28 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> if (rc)
> dev_dbg(&pdev->dev, "Failed to map RAS capability.\n");
>
> + bitmap_clear(expected, 0, CXL_MAX_CAPS);
> +
> + /*
> + * These are the mandatory capabilities for a Type3 device.
> + * Only checking capabilities used by current Linux drivers.
> + */
> + bitmap_set(expected, CXL_DEV_CAP_HDM, 1);
set_bit() - see comments in bitmap.h, these are fine applied to bitmaps
and make more sense for setting a single bit.
> + bitmap_set(expected, CXL_DEV_CAP_DEV_STATUS, 1);
> + bitmap_set(expected, CXL_DEV_CAP_MAILBOX_PRIMARY, 1);
> + bitmap_set(expected, CXL_DEV_CAP_MEMDEV, 1);
> +
> + /*
> + * Checking mandatory caps are there as, at least, a subset of those
> + * found.
> + */
> + if (!cxl_pci_check_caps(cxlds, expected, found)) {
> + dev_err(&pdev->dev,
> + "Expected mandatory capabilities not found: (%08lx - %08lx)\n",
> + *expected, *found);
There are printk formats for bitmaps that should be used here. %*pb
> + return -ENXIO;
> + }
> +
> rc = cxl_pci_type3_init_mailbox(cxlds);
> if (rc)
> return rc;
> diff --git a/include/cxl/cxl.h b/include/cxl/cxl.h
> index f656fcd4945f..05f06bfd2c29 100644
> --- a/include/cxl/cxl.h
> +++ b/include/cxl/cxl.h
> @@ -37,4 +37,7 @@ void cxl_set_dvsec(struct cxl_dev_state *cxlds, u16 dvsec);
> void cxl_set_serial(struct cxl_dev_state *cxlds, u64 serial);
> int cxl_set_resource(struct cxl_dev_state *cxlds, struct resource res,
> enum cxl_resource);
> +bool cxl_pci_check_caps(struct cxl_dev_state *cxlds,
> + unsigned long *expected_caps,
> + unsigned long *current_caps);
> #endif
next prev parent reply other threads:[~2024-12-24 17:15 UTC|newest]
Thread overview: 102+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-16 16:10 [PATCH v8 00/27] cxl: add type2 device basic support alejandro.lucero-palau
2024-12-16 16:10 ` [PATCH v8 01/27] " alejandro.lucero-palau
2024-12-24 16:35 ` Jonathan Cameron
2024-12-27 6:56 ` Alejandro Lucero Palau
2025-01-07 16:35 ` Alison Schofield
2025-01-07 23:42 ` Dan Williams
2025-01-08 1:33 ` Dan Williams
2025-01-08 14:32 ` Alejandro Lucero Palau
2025-01-14 14:35 ` Alejandro Lucero Palau
2025-01-14 16:40 ` Alejandro Lucero Palau
2025-01-14 22:52 ` Dan Williams
2025-01-15 16:01 ` Alejandro Lucero Palau
2025-01-16 6:16 ` Dan Williams
2025-01-16 10:02 ` Alejandro Lucero Palau
2025-02-05 20:05 ` Dan Williams
2025-02-06 17:37 ` Alejandro Lucero Palau
2025-02-07 1:57 ` Dan Williams
2025-01-24 13:38 ` Alejandro Lucero Palau
2025-01-08 14:11 ` Alejandro Lucero Palau
2025-01-14 23:48 ` Dan Williams
2024-12-16 16:10 ` [PATCH v8 02/27] sfc: add cxl support using new CXL API alejandro.lucero-palau
2024-12-24 17:04 ` Jonathan Cameron
2024-12-27 7:00 ` Alejandro Lucero Palau
2025-01-08 1:56 ` Dan Williams
2025-01-08 14:53 ` Alejandro Lucero Palau
2025-01-14 23:59 ` Dan Williams
2024-12-16 16:10 ` [PATCH v8 03/27] cxl: add capabilities field to cxl_dev_state and cxl_port alejandro.lucero-palau
2024-12-24 17:08 ` Jonathan Cameron
2024-12-27 7:07 ` Alejandro Lucero Palau
2025-01-02 12:49 ` Jonathan Cameron
2025-01-03 7:16 ` Alejandro Lucero Palau
2025-01-03 10:47 ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 04/27] cxl/pci: add check for validating capabilities alejandro.lucero-palau
2024-12-24 17:15 ` Jonathan Cameron [this message]
2024-12-27 7:47 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 05/27] cxl: move pci generic code alejandro.lucero-palau
2024-12-24 17:19 ` Jonathan Cameron
2024-12-27 7:53 ` Alejandro Lucero Palau
2025-01-08 5:19 ` Dan Williams
2025-01-08 14:39 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 06/27] cxl: add function for type2 cxl regs setup alejandro.lucero-palau
2024-12-24 17:22 ` Jonathan Cameron
2024-12-27 8:04 ` Alejandro Lucero Palau
2024-12-30 9:01 ` Alejandro Lucero Palau
2025-01-06 10:41 ` Dan Carpenter
2025-01-06 15:19 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 07/27] sfc: use cxl api for regs setup and checking alejandro.lucero-palau
2024-12-24 17:23 ` Jonathan Cameron
2024-12-27 8:05 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 08/27] cxl: add functions for resource request/release by a driver alejandro.lucero-palau
2024-12-24 17:25 ` Jonathan Cameron
2024-12-27 8:06 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 09/27] sfc: request cxl ram resource alejandro.lucero-palau
2024-12-24 17:27 ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 10/27] resource: harden resource_contains alejandro.lucero-palau
2024-12-24 17:27 ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 11/27] cxl: add function for setting media ready by a driver alejandro.lucero-palau
2024-12-24 17:29 ` Jonathan Cameron
2024-12-27 8:08 ` Alejandro Lucero Palau
2025-01-02 12:45 ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 12/27] sfc: set cxl media ready alejandro.lucero-palau
2024-12-16 16:10 ` [PATCH v8 13/27] cxl: prepare memdev creation for type2 alejandro.lucero-palau
2024-12-24 17:32 ` Jonathan Cameron
2024-12-27 8:28 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 14/27] sfc: create type2 cxl memdev alejandro.lucero-palau
2024-12-24 17:33 ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 15/27] cxl: define a driver interface for HPA free space enumeration alejandro.lucero-palau
2024-12-24 17:42 ` Jonathan Cameron
2024-12-27 10:05 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 16/27] sfc: obtain root decoder with enough HPA free space alejandro.lucero-palau
2024-12-18 11:17 ` Edward Cree
2024-12-24 17:43 ` Jonathan Cameron
2024-12-25 20:21 ` kernel test robot
2024-12-16 16:10 ` [PATCH v8 17/27] cxl: define a driver interface for DPA allocation alejandro.lucero-palau
2024-12-24 17:53 ` Jonathan Cameron
2024-12-27 10:23 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 18/27] sfc: get endpoint decoder alejandro.lucero-palau
2024-12-17 10:42 ` Simon Horman
2024-12-18 8:22 ` Alejandro Lucero Palau
2025-01-07 11:34 ` Simon Horman
2024-12-16 16:10 ` [PATCH v8 19/27] cxl: make region type based on endpoint type alejandro.lucero-palau
2024-12-24 17:54 ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 20/27] cxl/region: factor out interleave ways setup alejandro.lucero-palau
2024-12-24 17:56 ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 21/27] cxl/region: factor out interleave granularity setup alejandro.lucero-palau
2024-12-24 17:56 ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 22/27] cxl: allow region creation by type2 drivers alejandro.lucero-palau
2024-12-24 18:01 ` Jonathan Cameron
2024-12-27 10:27 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 23/27] cxl: add region flag for precluding a device memory to be used for dax alejandro.lucero-palau
2024-12-24 18:04 ` Jonathan Cameron
2024-12-27 8:46 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 24/27] sfc: create cxl region alejandro.lucero-palau
2024-12-24 18:05 ` Jonathan Cameron
2024-12-25 23:58 ` kernel test robot
2024-12-16 16:10 ` [PATCH v8 25/27] cxl: add function for obtaining region range alejandro.lucero-palau
2024-12-24 18:07 ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 26/27] sfc: update MCDI protocol headers alejandro.lucero-palau
2024-12-16 16:10 ` [PATCH v8 27/27] sfc: support pio mapping based on cxl alejandro.lucero-palau
2024-12-17 10:47 ` Simon Horman
2024-12-18 8:32 ` Alejandro Lucero Palau
2024-12-30 12:16 ` Alejandro Lucero Palau
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