From: Jakub Kicinski <kuba@kernel.org>
To: Parker Newman <parker@finest.io>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>,
Jose Abreu <joabreu@synopsys.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Paolo Abeni <pabeni@redhat.com>,
Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
netdev@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Parker Newman <pnewman@connecttech.com>
Subject: Re: [PATCH net v2 1/1] net: stmmac: dwmac-tegra: Read iommu stream id from device tree
Date: Thu, 9 Jan 2025 16:54:48 -0800 [thread overview]
Message-ID: <20250109165448.53cb3e48@kernel.org> (raw)
In-Reply-To: <6fb97f32cf4accb4f7cf92846f6b60064ba0a3bd.1736284360.git.pnewman@connecttech.com>
On Tue, 7 Jan 2025 16:24:59 -0500 Parker Newman wrote:
> Nvidia's Tegra MGBE controllers require the IOMMU "Stream ID" (SID) to be
> written to the MGBE_WRAP_AXI_ASID0_CTRL register.
>
> The current driver is hard coded to use MGBE0's SID for all controllers.
> This causes softirq time outs and kernel panics when using controllers
> other than MGBE0.
Applied, thanks!
prev parent reply other threads:[~2025-01-10 0:54 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-07 21:24 [PATCH net v2 1/1] net: stmmac: dwmac-tegra: Read iommu stream id from device tree Parker Newman
2025-01-07 21:32 ` Andrew Lunn
2025-01-08 16:40 ` Thierry Reding
2025-01-10 0:54 ` Jakub Kicinski [this message]
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