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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , netdev@vger.kernel.org Subject: Re: [PATCH RFC net-next 4/4] net: xpcs: allow 1000BASE-X to work with older XPCS IP Message-ID: <20250210120208.7y3eehmuri5nwore@skbuf> References: <20250210110555.stuowh5l6hmz2yxh@skbuf> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Mon, Feb 10, 2025 at 11:49:21AM +0000, Russell King (Oracle) wrote: > On Mon, Feb 10, 2025 at 01:05:55PM +0200, Vladimir Oltean wrote: > > I do believe that this is the kind of patch one would write when the > > hardware is completely a black box. But when we have Microchip engineers > > here with a channel open towards their hardware design who can help > > clarify where the requirement comes from, that just isn't the case. > > So I wouldn't rush with this. > > > > Plus, it isn't even the most conservative way in which a (supposedly) > > integration-specific requirement is fulfilled in the common Synopsys > > driver. If one integration makes vendor-specific choices about these > > bits, I wouldn't assume that no other vendors made contradictory choices. > > > > I don't want to say too much before Tristram comes with a statement from > > Microchip hardware design, but _if_ it turns out to be a KSZ9477 > > specific requirement, it still seems safer to only enable this based > > (at least) on Tristram's MICROCHIP_KSZ9477_PMA_ID conditional from his > > other patch set, if not based on something stronger (a conditional > > describing some functional behavior, rather than a specific hardware IP). > > So Jose's public reassurance means nothing? [ for context to all readers, _this_ public reassurance: https://lore.kernel.org/netdev/DM4PR12MB5088BA650B164D5CEC33CA08D3E82@DM4PR12MB5088.namprd12.prod.outlook.com/ ] Yup, this is what I'm saying. He basically said that it's outside of Synopsys control how these bits are used in the final integration. And if so, it's also naturally outside of vendor X's (Microchip) control how vendor Y adds integration-specific logic to Synopsys-undefined bits for 1000Base-X mode. Thus, the only thing I'm saying is that it isn't the safest thing we can do, in Linux, to assume that no other integration has added a contradictory vendor-defined behavior for these bits. It's an assumption we aren't even _forced_ to make, so why risk it?