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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Niklas =?utf-8?Q?S=C3=B6derlund?= , Gregor Herburger , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH net-next 1/3] net: phy: marvell-88q2xxx: align defines Message-ID: <20250218181303.GA3816@debian> References: <20250214-marvell-88q2xxx-cleanup-v1-0-71d67c20f308@gmail.com> <20250214-marvell-88q2xxx-cleanup-v1-1-71d67c20f308@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Am Tue, Feb 18, 2025 at 04:00:42PM +0000 schrieb Russell King (Oracle): > On Tue, Feb 18, 2025 at 12:54:29PM +0100, Marek Behún wrote: > > > +#define MDIO_MMD_AN_MV_STAT 32769 > > > > Why the hell are register addresses in this driver in decimal? > > Shocker - some documentation gives driver addresses for PHYs in > decimal. > > It then becomes a pain to have to manually translate back and > forth between hex and decimal if one is reading the driver code and > referring back to the documentation. > Agreed. Is it worth to change addresses to hexadecimal numbers and use BIT and GENMASK for the bits ? Best regards, Dimitri Fedrau