From: Aurelien Aptel <aaptel@nvidia.com>
To: linux-nvme@lists.infradead.org, netdev@vger.kernel.org,
sagi@grimberg.me, hch@lst.de, kbusch@kernel.org, axboe@fb.com,
chaitanyak@nvidia.com, davem@davemloft.net, kuba@kernel.org
Cc: Or Gerlitz <ogerlitz@nvidia.com>,
aaptel@nvidia.com, aurelien.aptel@gmail.com, smalin@nvidia.com,
malin1024@gmail.com, yorayz@nvidia.com, borisp@nvidia.com,
galshalom@nvidia.com, mgurtovoy@nvidia.com
Subject: [PATCH v26 11/20] net/mlx5e: Refactor ico sq polling to get budget
Date: Fri, 21 Feb 2025 09:52:16 +0000 [thread overview]
Message-ID: <20250221095225.2159-12-aaptel@nvidia.com> (raw)
In-Reply-To: <20250221095225.2159-1-aaptel@nvidia.com>
From: Or Gerlitz <ogerlitz@nvidia.com>
The mlx5e driver uses ICO SQs for internal control operations which
are not visible to the network stack, such as UMR mapping for striding
RQ (MPWQ) and etc more cases.
The upcoming nvmeotcp offload uses ico sq for umr mapping as part of the
offload. As a pre-step for nvmeotcp ico sqs which have their own napi and
need to comply with budget, add the budget as parameter to the polling of
cqs related to ico sqs.
The polling already stops after a limit is reached, so just have the
caller to provide this limit as the budget.
Additionally, we move the mdev pointer directly on the icosq structure.
This provides better separation between channels to ICO SQs for use-cases
where they are not tightly coupled (such as the upcoming nvmeotcp code).
No functional change here.
Signed-off-by: Or Gerlitz <ogerlitz@nvidia.com>
Signed-off-by: Aurelien Aptel <aaptel@nvidia.com>
Reviewed-by: Tariq Toukan <tariqt@nvidia.com>
---
drivers/net/ethernet/mellanox/mlx5/core/en.h | 1 +
drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c | 4 ++--
drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h | 2 +-
drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 5 ++---
drivers/net/ethernet/mellanox/mlx5/core/en_rx.c | 4 ++--
drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c | 4 ++--
6 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h
index 769e683f2488..999c8ee8c1c0 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h
@@ -539,6 +539,7 @@ struct mlx5e_icosq {
/* control path */
struct mlx5_wq_ctrl wq_ctrl;
struct mlx5e_channel *channel;
+ struct mlx5_core_dev *mdev;
struct work_struct recover_work;
} ____cacheline_aligned_in_smp;
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c
index e75759533ae0..89807aaa870d 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c
@@ -46,7 +46,7 @@ static int mlx5e_query_rq_state(struct mlx5_core_dev *dev, u32 rqn, u8 *state)
static int mlx5e_wait_for_icosq_flush(struct mlx5e_icosq *icosq)
{
- struct mlx5_core_dev *dev = icosq->channel->mdev;
+ struct mlx5_core_dev *dev = icosq->mdev;
unsigned long exp_time;
exp_time = jiffies + msecs_to_jiffies(mlx5_tout_ms(dev, FLUSH_ON_ERROR));
@@ -91,7 +91,7 @@ static int mlx5e_rx_reporter_err_icosq_cqe_recover(void *ctx)
rq = &icosq->channel->rq;
if (test_bit(MLX5E_RQ_STATE_ENABLED, &icosq->channel->xskrq.state))
xskrq = &icosq->channel->xskrq;
- mdev = icosq->channel->mdev;
+ mdev = icosq->mdev;
dev = icosq->channel->netdev;
err = mlx5_core_query_sq_state(mdev, icosq->sqn, &state);
if (err) {
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h b/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h
index 5ec468268d1a..e710053f41fc 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h
@@ -83,7 +83,7 @@ void mlx5e_trigger_irq(struct mlx5e_icosq *sq);
void mlx5e_completion_event(struct mlx5_core_cq *mcq, struct mlx5_eqe *eqe);
void mlx5e_cq_error_event(struct mlx5_core_cq *mcq, enum mlx5_event event);
int mlx5e_napi_poll(struct napi_struct *napi, int budget);
-int mlx5e_poll_ico_cq(struct mlx5e_cq *cq);
+int mlx5e_poll_ico_cq(struct mlx5e_cq *cq, int budget);
/* RX */
INDIRECT_CALLABLE_DECLARE(bool mlx5e_post_rx_wqes(struct mlx5e_rq *rq));
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
index 5d5e7b19c396..229e5efa5a73 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
@@ -1537,6 +1537,7 @@ static int mlx5e_alloc_icosq(struct mlx5e_channel *c,
int err;
sq->channel = c;
+ sq->mdev = mdev;
sq->uar_map = mdev->mlx5e_res.hw_objs.bfreg.map;
sq->reserved_room = param->stop_room;
@@ -1995,11 +1996,9 @@ void mlx5e_deactivate_icosq(struct mlx5e_icosq *icosq)
static void mlx5e_close_icosq(struct mlx5e_icosq *sq)
{
- struct mlx5e_channel *c = sq->channel;
-
if (sq->ktls_resync)
mlx5e_ktls_rx_resync_destroy_resp_list(sq->ktls_resync);
- mlx5e_destroy_sq(c->mdev, sq->sqn);
+ mlx5e_destroy_sq(sq->mdev, sq->sqn);
mlx5e_free_icosq_descs(sq);
mlx5e_free_icosq(sq);
}
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c
index 1963bc5adb18..6512ab90b800 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c
@@ -988,7 +988,7 @@ static void mlx5e_handle_shampo_hd_umr(struct mlx5e_shampo_umr umr,
mlx5e_shampo_fill_umr(rq, umr.len);
}
-int mlx5e_poll_ico_cq(struct mlx5e_cq *cq)
+int mlx5e_poll_ico_cq(struct mlx5e_cq *cq, int budget)
{
struct mlx5e_icosq *sq = container_of(cq, struct mlx5e_icosq, cq);
struct mlx5_cqe64 *cqe;
@@ -1063,7 +1063,7 @@ int mlx5e_poll_ico_cq(struct mlx5e_cq *cq)
wi->wqe_type);
}
} while (!last_wqe);
- } while ((++i < MLX5E_TX_CQ_POLL_BUDGET) && (cqe = mlx5_cqwq_get_cqe(&cq->wq)));
+ } while ((++i < budget) && (cqe = mlx5_cqwq_get_cqe(&cq->wq)));
sq->cc = sqcc;
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c
index 76108299ea57..af0ae65cb87c 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c
@@ -179,8 +179,8 @@ int mlx5e_napi_poll(struct napi_struct *napi, int budget)
busy |= work_done == budget;
- mlx5e_poll_ico_cq(&c->icosq.cq);
- if (mlx5e_poll_ico_cq(&c->async_icosq.cq))
+ mlx5e_poll_ico_cq(&c->icosq.cq, MLX5E_TX_CQ_POLL_BUDGET);
+ if (mlx5e_poll_ico_cq(&c->async_icosq.cq, MLX5E_TX_CQ_POLL_BUDGET))
/* Don't clear the flag if nothing was polled to prevent
* queueing more WQEs and overflowing the async ICOSQ.
*/
--
2.34.1
next prev parent reply other threads:[~2025-02-21 9:53 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-21 9:52 [PATCH v26 00/20] nvme-tcp receive offloads Aurelien Aptel
2025-02-21 9:52 ` [PATCH v26 01/20] net: Introduce direct data placement tcp offload Aurelien Aptel
2025-02-25 10:23 ` Paolo Abeni
2025-02-25 13:34 ` Aurelien Aptel
2025-02-25 17:15 ` Aurelien Aptel
2025-02-21 9:52 ` [PATCH v26 02/20] netlink: add new family to manage ULP_DDP enablement and stats Aurelien Aptel
2025-02-21 9:52 ` [PATCH v26 03/20] iov_iter: skip copy if src == dst for direct data placement Aurelien Aptel
2025-02-21 9:52 ` [PATCH v26 04/20] net/tls,core: export get_netdev_for_sock Aurelien Aptel
2025-02-21 9:52 ` [PATCH v26 05/20] nvme-tcp: Add DDP offload control path Aurelien Aptel
2025-02-21 9:52 ` [PATCH v26 06/20] nvme-tcp: Add DDP data-path Aurelien Aptel
2025-02-21 9:52 ` [PATCH v26 07/20] nvme-tcp: RX DDGST offload Aurelien Aptel
2025-02-25 10:42 ` Paolo Abeni
2025-02-25 13:34 ` Aurelien Aptel
2025-02-21 9:52 ` [PATCH v26 08/20] nvme-tcp: Deal with netdevice DOWN events Aurelien Aptel
2025-02-21 9:52 ` [PATCH v26 09/20] Documentation: add ULP DDP offload documentation Aurelien Aptel
2025-02-21 9:52 ` [PATCH v26 10/20] net/mlx5e: Rename from tls to transport static params Aurelien Aptel
2025-02-21 9:52 ` Aurelien Aptel [this message]
2025-02-21 9:52 ` [PATCH v26 12/20] net/mlx5: Add NVMEoTCP caps, HW bits, 128B CQE and enumerations Aurelien Aptel
2025-02-21 9:52 ` [PATCH v26 13/20] net/mlx5e: NVMEoTCP, offload initialization Aurelien Aptel
2025-02-21 9:52 ` [PATCH v26 14/20] net/mlx5e: TCP flow steering for nvme-tcp acceleration Aurelien Aptel
2025-02-21 9:52 ` [PATCH v26 15/20] net/mlx5e: NVMEoTCP, use KLM UMRs for buffer registration Aurelien Aptel
2025-02-21 9:52 ` [PATCH v26 16/20] net/mlx5e: NVMEoTCP, queue init/teardown Aurelien Aptel
2025-02-21 9:52 ` [PATCH v26 17/20] net/mlx5e: NVMEoTCP, ddp setup and resync Aurelien Aptel
2025-02-21 9:52 ` [PATCH v26 18/20] net/mlx5e: NVMEoTCP, async ddp invalidation Aurelien Aptel
2025-02-21 9:52 ` [PATCH v26 19/20] net/mlx5e: NVMEoTCP, data-path for DDP+DDGST offload Aurelien Aptel
2025-02-21 9:52 ` [PATCH v26 20/20] net/mlx5e: NVMEoTCP, statistics Aurelien Aptel
2025-02-25 10:12 ` [PATCH v26 00/20] nvme-tcp receive offloads Paolo Abeni
2025-02-25 13:38 ` Gustavo Padovan
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