From: Bjorn Helgaas <helgaas@kernel.org>
To: "hans.zhang" <hans.zhang@cixtech.com>
Cc: bhelgaas@google.com, cix-kernel-upstream@cixtech.com,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
Peter Chen <peter.chen@cixtech.com>,
ChunHao Lin <hau@realtek.com>,
Heiner Kallweit <hkallweit1@gmail.com>,
nic_swsd@realtek.com, netdev@vger.kernel.org
Subject: Re: [PATCH] PCI: Add PCI quirk to disable L0s ASPM state for RTL8125 2.5GbE Controller
Date: Thu, 6 Mar 2025 10:28:42 -0600 [thread overview]
Message-ID: <20250306162842.GA344204@bhelgaas> (raw)
In-Reply-To: <84a00461-b8fa-48d0-9049-9a34abfe87a3@cixtech.com>
On Thu, Mar 06, 2025 at 11:32:04AM +0800, hans.zhang wrote:
> On 2025/3/6 06:20, Bjorn Helgaas wrote:
> > Sounds like this should be a documented erratum. Realtek folks? Or
> > maybe an erratum on the other end of the link, which looks like a CIX
> > Root Port:
> >
> > https://admin.pci-ids.ucw.cz/read/PC/1f6c/0001
>
> Name: CIX P1 CD8180 PCI Express Root Port
>
> 0000:90:00.0 PCI bridge [0604]: Device [1f6c:0001]
> 0001:60:00.0 PCI bridge [0604]: Device [1f6c:0001]
> 0002:00:00.0 PCI bridge [0604]: Device [1f6c:0001]
> 0003:30:00.0 PCI bridge [0604]: Device [1f6c:0001]
>
>
> This URL does not appear right, how should be changed, is it you? Or can you
> tell me who I should call to change it?
>
> The correct answer is:
> 0000:90:00.0 PCI bridge [0604]: Device [1f6c:0001]
> 0001:C0:00.0 PCI bridge [0604]: Device [1f6c:0001]
> 0002:60:00.0 PCI bridge [0604]: Device [1f6c:0001]
> 0003:30:00.0 PCI bridge [0604]: Device [1f6c:0001]
> 0004:00:00.0 PCI bridge [0604]: Device [1f6c:0001]
This part of the web page is just commentary. In this case it's just
an example of what devices might be on some system. It's not a
requirement that all systems have this many devices or devices at
these addresses.
The only important parts are the Vendor ID, Device ID, and the name
("CIX P1 CD8180 PCI Express Root Port"). If those are correct, no
need to do anything.
> The domain might be random, so whichever controller probes first, it's
> assigned first. The URL currently shows the BDF with one controller missing.
> That's the order in which we're going to controller probe.
>
> Best regards,
> Hans
>
>
next prev parent reply other threads:[~2025-03-06 16:28 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20250305063035.415717-1-hans.zhang@cixtech.com>
2025-03-05 22:20 ` [PATCH] PCI: Add PCI quirk to disable L0s ASPM state for RTL8125 2.5GbE Controller Bjorn Helgaas
2025-03-06 3:16 ` hans.zhang
2025-03-06 3:32 ` hans.zhang
2025-03-06 16:28 ` Bjorn Helgaas [this message]
2025-03-07 1:38 ` hans.zhang
2025-03-06 23:00 ` Heiner Kallweit
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