Re: [PATCH net v2 4/5] net: ethernet: mtk_eth_soc: net: revise NETSYSv3 hardware configuration

[Jakub Kicinski <kuba@kernel.org>]

On Wed, 16 Apr 2025 01:51:42 +0100 Daniel Golle wrote:
> +		/* PSE should not drop port8, port9 and port13 packets from WDMA Tx */
> +		mtk_w32(eth, 0x00002300, PSE_DROP_CFG);
> +
> +		/* PSE should drop packets to port8, port9 and port13 on WDMA Rx ring full */

nit: please try to wrap at 80 chars. There's really no need to go over
on comments. Some of us stick to 80 char terminals. 

> +		mtk_w32(eth, 0x00002300, PSE_PPE_DROP(0));
> +		mtk_w32(eth, 0x00002300, PSE_PPE_DROP(1));
> +		mtk_w32(eth, 0x00002300, PSE_PPE_DROP(2));
>  
>  		/* GDM and CDM Threshold */
> -		mtk_w32(eth, 0x00000707, MTK_CDMW0_THRES);
> +		mtk_w32(eth, 0x08000707, MTK_CDMW0_THRES);
>  		mtk_w32(eth, 0x00000077, MTK_CDMW1_THRES);
>  
>  		/* Disable GDM1 RX CRC stripping */
> @@ -4064,7 +4076,7 @@ static int mtk_hw_init(struct mtk_eth *eth, bool reset)
>  		mtk_w32(eth, 0x00000300, PSE_DROP_CFG);
>  
>  		/* PSE should drop packets to port 8/9 on WDMA Rx ring full */
> -		mtk_w32(eth, 0x00000300, PSE_PPE0_DROP);
> +		mtk_w32(eth, 0x00000300, PSE_PPE_DROP(0));
>  
>  		/* PSE Free Queue Flow Control  */
>  		mtk_w32(eth, 0x01fa01f4, PSE_FQFC_CFG2);
> diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
> index 39709649ea8d1..eaa96c8483b70 100644
> --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
> +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
> @@ -151,7 +151,12 @@
>  #define PSE_FQFC_CFG1		0x100
>  #define PSE_FQFC_CFG2		0x104
>  #define PSE_DROP_CFG		0x108
> -#define PSE_PPE0_DROP		0x110
> +#define PSE_PPE_DROP(x)		(0x110 + ((x) * 0x4))
> +
> +/* PSE Last FreeQ Page Request Control */
> +#define PSE_DUMY_REQ		0x10C

This really looks like misspelling of DUMMY, is it really supposed 
to have one 'M' ?