From: Lukasz Majewski <lukma@denx.de>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Jakub Kicinski <kuba@kernel.org>,
Andrew Lunn <andrew+netdev@lunn.ch>,
davem@davemloft.net, Eric Dumazet <edumazet@google.com>,
Paolo Abeni <pabeni@redhat.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
Richard Cochran <richardcochran@gmail.com>,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
Stefan Wahren <wahrenst@gmx.net>, Simon Horman <horms@kernel.org>,
Andrew Lunn <andrew@lunn.ch>
Subject: Re: [net-next v7 4/7] net: mtip: The L2 switch driver for imx287
Date: Fri, 25 Apr 2025 12:58:08 +0200 [thread overview]
Message-ID: <20250425125808.7f1ad08c@wsk> (raw)
In-Reply-To: <fc450dca-a1ba-4b9f-befa-f9643d9b1b82@kernel.org>
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Hi Krzysztof,
> On 25/04/2025 09:49, Lukasz Majewski wrote:
> > Hi Krzysztof, Jakub
> >
> >> On 25/04/2025 08:05, Lukasz Majewski wrote:
> >>> Hi Krzysztof, Jakub,
> >>>
> >>>> On 25/04/2025 03:11, Jakub Kicinski wrote:
> >>>>> On Wed, 23 Apr 2025 09:29:08 +0200 Lukasz Majewski wrote:
> >>>>>> This patch series provides support for More Than IP L2 switch
> >>>>>> embedded in the imx287 SoC.
> >>>>>>
> >>>>>> This is a two port switch (placed between uDMA[01] and
> >>>>>> MAC-NET[01]), which can be used for offloading the network
> >>>>>> traffic.
> >>>>>>
> >>>>>> It can be used interchangeably with current FEC driver - to be
> >>>>>> more specific: one can use either of it, depending on the
> >>>>>> requirements.
> >>>>>>
> >>>>>> The biggest difference is the usage of DMA - when FEC is used,
> >>>>>> separate DMAs are available for each ENET-MAC block.
> >>>>>> However, with switch enabled - only the DMA0 is used to
> >>>>>> send/receive data to/form switch (and then switch sends them to
> >>>>>> respecitive ports).
> >>>>>
> >>>>> Lots of sparse warnings and build issues here, at least on x86.
> >>>>>
> >>>>> Could you make sure it's clean with an allmodconfig config,
> >>>>> something like:
> >>>>>
> >>>>> make C=1 W=1 drivers/net/ethernet/freescale/mtipsw/
> >>>>
> >>>> ... and W=1 with clang as well.
> >>>>
> >>>
> >>> The sparse warnings are because of struct switch_t casting and
> >>> register
> >>
> >> clang W=1 fails on errors, so it is not only sparse:
> >>
> >> error: cast to smaller integer type 'uint' (aka 'unsigned int')
> >> from 'struct cbd_t *' [-Werror,-Wpointer-to-int-cast]
> >>
> >> You probably wanted there kenel_ulong_t.
> >
> > This I did not catch earlier (probably because of my testing on
> > imx287). Thanks for spotting it.
> >
> >>
> >>> access with this paradigm (as it is done with other drivers).
> >>
> >> I don't understand. I see code like:
> >>
> >> struct switch_t *fecp = fep->hwp;
> >>
> >> But this is not a cast - the same types.
> >
> > For example:
> >
> > The warning:
> >
> > mtipl2sw.c:208:30: warning: incorrect type in argument 1 (different
> > address spaces) mtipl2sw.c:208:30: expected void const volatile
> > [noderef] __iomem *addr mtipl2sw.c:208:30: got unsigned int *
> >
> > corresponds to:
> > info->maclo = readl(&fecp->ESW_LREC0); [*]
> >
> > where:
> >
> > struct switch_t {
> > u32 ESW_REVISION;
> > u32 ESW_SCRATCH;
> > ...
> > /*from 0x420-0x4FC*/
> > u32 esw_reserved9[57];
> > /*0xFC0DC500---0xFC0DC508*/
> > u32 ESW_LREC0;
> > u32 ESW_LREC1;
> > u32 ESW_LSR;
> > };
> >
> >
> > The 'u32' type seems to be valid here as this register is 32 bit
> > wide.
>
> It is not about size, but IOMEM annotation and pointer/non-pointer.
>
+1
>
> >
> > To fix the sparse warnings - I think that I will replace [*] with:
> >
> > info->maclo = readl((u32 __iomem *)&fecp->ESW_LREC0);
>
> I don't understand why are you reading address of ESW_LREC0.
The driver (still) uses the apparently "old" programming paradigm, so
there is struct switch_t with u32 elements cast to the __iomem address.
If I want to have the address - I'm using & on the element of the
struct. That is why sparse is complaining as it in fact gets pointer to
u32.
In the fec.h the set of #defines are used and void __iomem *hwp;
pointer.
It looks like to make the spare happy - I need to use similar approach
with the mtip.
The other option would be to add (u32 __iomem *) explicit cast to
readl()/writel().
Or do you see another solution?
> This is
> MMIO, right? So you are supposes to read base + offset (where base is
> a proper iomem pointer).
>
>
> Best regards,
> Krzysztof
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Erika Unter
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
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next prev parent reply other threads:[~2025-04-25 10:58 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-23 7:29 [net-next v7 0/7] net: mtip: Add support for MTIP imx287 L2 switch driver Lukasz Majewski
2025-04-23 7:29 ` [net-next v7 1/7] dt-bindings: net: Add MTIP L2 switch description Lukasz Majewski
2025-04-23 7:29 ` [net-next v7 2/7] ARM: dts: nxp: mxs: Adjust the imx28.dtsi " Lukasz Majewski
2025-04-23 7:29 ` [net-next v7 3/7] ARM: dts: nxp: mxs: Adjust XEA board's DTS to support L2 switch Lukasz Majewski
2025-04-23 7:29 ` [net-next v7 4/7] net: mtip: The L2 switch driver for imx287 Lukasz Majewski
2025-04-25 1:11 ` Jakub Kicinski
2025-04-25 5:33 ` Krzysztof Kozlowski
2025-04-25 6:05 ` Lukasz Majewski
2025-04-25 6:18 ` Krzysztof Kozlowski
2025-04-25 7:49 ` Lukasz Majewski
2025-04-25 8:08 ` Krzysztof Kozlowski
2025-04-25 10:58 ` Lukasz Majewski [this message]
2025-04-23 7:29 ` [net-next v7 5/7] ARM: mxs_defconfig: Enable CONFIG_NFS_FSCACHE Lukasz Majewski
2025-04-23 7:29 ` [net-next v7 6/7] ARM: mxs_defconfig: Update mxs_defconfig to 6.15-rc1 Lukasz Majewski
2025-04-23 7:29 ` [net-next v7 7/7] ARM: mxs_defconfig: Enable CONFIG_FEC_MTIP_L2SW to support MTIP L2 switch Lukasz Majewski
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