Re: [PATCH v2 3/5] arm64: dts: allwinner: a523: Add EMAC0 ethernet MAC

Andre Przywara
2025-04-24T23:20:49Z

On Thu, 24 Apr 2025 18:08:41 +0800
Yixun Lan <dlan@gentoo.org> wrote:

> Add EMAC0 ethernet MAC support which found on A523 variant SoCs,
> including the A527/T527 chips. MAC0 is compatible to the A64 chip which
> requires an external PHY. This patch only add RGMII pins for now.
>
> Signed-off-by: Yixun Lan <dlan@gentoo.org>

Thanks, looks good now!

Reviewed-by: Andre Przywara <andre.przywara@arm.com>

Cheers,
Andre

> ---
> arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 40 ++++++++++++++++++++++++++
> 1 file changed, 40 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> index ee485899ba0af69f32727a53de20051a2e31be1d..c9a9b9dd479af05ba22fe9d783e32f6d61a74ef7 100644
> --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> @@ -126,6 +126,15 @@ pio: pinctrl@2000000 {
> interrupt-controller;
> #interrupt-cells = <3>;
>
> + rgmii0_pins: rgmii0-pins {
> + pins = "PH0", "PH1", "PH2", "PH3", "PH4",
> + "PH5", "PH6", "PH7", "PH9", "PH10",
> + "PH14", "PH15", "PH16", "PH17", "PH18";
> + allwinner,pinmux = <5>;
> + function = "emac0";
> + drive-strength = <40>;
> + };
> +
> mmc0_pins: mmc0-pins {
> pins = "PF0" ,"PF1", "PF2", "PF3", "PF4", "PF5";
> allwinner,pinmux = <2>;
> @@ -409,6 +418,15 @@ i2c5: i2c@2503400 {
> #size-cells = <0>;
> };
>
> + syscon: syscon@3000000 {
> + compatible = "allwinner,sun55i-a523-system-control",
> + "allwinner,sun50i-a64-system-control";
> + reg = <0x03000000 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + };
> +
> gic: interrupt-controller@3400000 {
> compatible = "arm,gic-v3";
> #address-cells = <1>;
> @@ -521,6 +539,28 @@ ohci1: usb@4200400 {
> status = "disabled";
> };
>
> + emac0: ethernet@4500000 {
> + compatible = "allwinner,sun55i-a523-emac0",
> + "allwinner,sun50i-a64-emac";
> + reg = <0x04500000 0x10000>;
> + clocks = <&ccu CLK_BUS_EMAC0>;
> + clock-names = "stmmaceth";
> + resets = <&ccu RST_BUS_EMAC0>;
> + reset-names = "stmmaceth";
> + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "macirq";
> + pinctrl-names = "default";
> + pinctrl-0 = <&rgmii0_pins>;
> + syscon = <&syscon>;
> + status = "disabled";
> +
> + mdio0: mdio {
> + compatible = "snps,dwmac-mdio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> +
> r_ccu: clock-controller@7010000 {
> compatible = "allwinner,sun55i-a523-r-ccu";
> reg = <0x7010000 0x250>;
>