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From: Ivan Vecera <ivecera@redhat.com>
To: netdev@vger.kernel.org
Cc: Vadim Fedorenko <vadim.fedorenko@linux.dev>,
	Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
	Jiri Pirko <jiri@resnulli.us>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Prathosh Satish <Prathosh.Satish@microchip.com>,
	"David S. Miller" <davem@davemloft.net>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Simon Horman <horms@kernel.org>, Lee Jones <lee@kernel.org>,
	Andy Shevchenko <andy@kernel.org>,
	Michal Schmidt <mschmidt@redhat.com>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-doc@vger.kernel.org
Subject: [PATCH net-next v7 8/8] mfd: zl3073x: Register DPLL sub-device during init
Date: Wed,  7 May 2025 14:43:58 +0200	[thread overview]
Message-ID: <20250507124358.48776-9-ivecera@redhat.com> (raw)
In-Reply-To: <20250507124358.48776-1-ivecera@redhat.com>

Register DPLL sub-devices to expose the functionality provided
by ZL3073x chip family. Each sub-device represents one of
the available DPLL channels.

Signed-off-by: Ivan Vecera <ivecera@redhat.com>
---
v6->v7:
* use platform data to pass the channel to use
v4->v6:
* no change
v3->v4:
* use static mfd cells
---
 drivers/mfd/zl3073x-core.c  | 30 ++++++++++++++++++++++++++++++
 include/linux/mfd/zl3073x.h |  9 +++++++++
 2 files changed, 39 insertions(+)

diff --git a/drivers/mfd/zl3073x-core.c b/drivers/mfd/zl3073x-core.c
index 0bea696a46b8..ebbad87354fd 100644
--- a/drivers/mfd/zl3073x-core.c
+++ b/drivers/mfd/zl3073x-core.c
@@ -7,6 +7,7 @@
 #include <linux/device.h>
 #include <linux/export.h>
 #include <linux/math64.h>
+#include <linux/mfd/core.h>
 #include <linux/mfd/zl3073x.h>
 #include <linux/module.h>
 #include <linux/netlink.h>
@@ -755,6 +756,26 @@ static void zl3073x_devlink_unregister(void *ptr)
 	devlink_unregister(ptr);
 }
 
+static const struct zl3073x_pdata zl3073x_pdata[ZL3073X_MAX_CHANNELS] = {
+	{ .channel = 0, },
+	{ .channel = 1, },
+	{ .channel = 2, },
+	{ .channel = 3, },
+	{ .channel = 4, },
+};
+
+#define ZL3073X_CELL(_name, _channel)				\
+	MFD_CELL_BASIC(_name, NULL, &zl3073x_pdata[_channel],	\
+		       sizeof(struct zl3073x_pdata), 0)
+
+static const struct mfd_cell zl3073x_devs[] = {
+	ZL3073X_CELL("zl3073x-dpll", 0),
+	ZL3073X_CELL("zl3073x-dpll", 1),
+	ZL3073X_CELL("zl3073x-dpll", 2),
+	ZL3073X_CELL("zl3073x-dpll", 3),
+	ZL3073X_CELL("zl3073x-dpll", 4),
+};
+
 /**
  * zl3073x_dev_probe - initialize zl3073x device
  * @zldev: pointer to zl3073x device
@@ -826,6 +847,15 @@ int zl3073x_dev_probe(struct zl3073x_dev *zldev,
 	if (rc)
 		return rc;
 
+	/* Add DPLL sub-device cell for each DPLL channel */
+	rc = devm_mfd_add_devices(zldev->dev, PLATFORM_DEVID_AUTO, zl3073x_devs,
+				  chip_info->num_channels, NULL, 0, NULL);
+	if (rc) {
+		dev_err_probe(zldev->dev, rc,
+			      "Failed to add DPLL sub-device\n");
+		return rc;
+	}
+
 	/* Register the device as devlink device */
 	devlink = priv_to_devlink(zldev);
 	devlink_register(devlink);
diff --git a/include/linux/mfd/zl3073x.h b/include/linux/mfd/zl3073x.h
index 4dc68013b69f..cf4663cab72a 100644
--- a/include/linux/mfd/zl3073x.h
+++ b/include/linux/mfd/zl3073x.h
@@ -12,6 +12,7 @@ struct regmap;
 /*
  * Hardware limits for ZL3073x chip family
  */
+#define ZL3073X_MAX_CHANNELS	5
 #define ZL3073X_NUM_INPUTS	10
 #define ZL3073X_NUM_OUTPUTS	10
 #define ZL3073X_NUM_SYNTHS	5
@@ -48,6 +49,14 @@ struct zl3073x_synth {
 	u8	dpll;
 };
 
+/**
+ * struct zl3073x_pdata - zl3073x sub-device platform data
+ * @channel: channel to use
+ */
+struct zl3073x_pdata {
+	u8	channel;
+};
+
 /**
  * struct zl3073x_dev - zl3073x device
  * @dev: pointer to device
-- 
2.49.0


  parent reply	other threads:[~2025-05-07 12:45 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-07 12:43 [PATCH net-next v7 0/8] Add Microchip ZL3073x support (part 1) Ivan Vecera
2025-05-07 12:43 ` [PATCH net-next v7 1/8] dt-bindings: dpll: Add DPLL device and pin Ivan Vecera
2025-05-07 12:43 ` [PATCH net-next v7 2/8] dt-bindings: dpll: Add support for Microchip Azurite chip family Ivan Vecera
2025-05-07 12:43 ` [PATCH net-next v7 3/8] mfd: Add Microchip ZL3073x support Ivan Vecera
2025-05-07 12:43 ` [PATCH net-next v7 4/8] mfd: zl3073x: Add support for devlink device info Ivan Vecera
2025-05-07 12:43 ` [PATCH net-next v7 5/8] mfd: zl3073x: Protect operations requiring multiple register accesses Ivan Vecera
2025-05-07 12:43 ` [PATCH net-next v7 6/8] mfd: zl3073x: Fetch invariants during probe Ivan Vecera
2025-05-07 12:43 ` [PATCH net-next v7 7/8] mfd: zl3073x: Add clock_id field Ivan Vecera
2025-05-07 12:43 ` Ivan Vecera [this message]
2025-05-07 13:30   ` [PATCH net-next v7 8/8] mfd: zl3073x: Register DPLL sub-device during init Andy Shevchenko
2025-05-07 13:41   ` Andy Shevchenko
2025-05-07 13:56     ` Ivan Vecera
2025-05-07 14:59       ` Andy Shevchenko
2025-05-07 15:26         ` Lee Jones
2025-05-12 11:55           ` Ivan Vecera
2025-05-13  9:41             ` Lee Jones
2025-05-13 10:47               ` Ivan Vecera
2025-05-19 16:59                 ` Ivan Vecera
2025-05-22  7:39                 ` Lee Jones
2025-05-22  8:54                   ` Ivan Vecera
2025-05-22 10:45                     ` Lee Jones
2025-05-22 11:23                       ` Ivan Vecera
2025-06-12 10:26                         ` Lee Jones
2025-05-07 14:19     ` Ivan Vecera
2025-05-07 15:00       ` Andy Shevchenko
2025-05-07 15:23         ` Ivan Vecera

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