[net-next v2 PATCH 0/2] octeontx2-pf: Do not detect MACSEC block based on silicon

[net-next v2 PATCH 0/2] octeontx2-pf: Do not detect MACSEC block based on silicon

[Subbaraya Sundeep]

Out of various silicon variants of CN10K series some have hardware
MACSEC block for offloading MACSEC operations and some do not.
AF driver already has the information of whether MACSEC is present
or not on running silicon. Hence fetch that information from
AF via mailbox message.

Changes for v2:
 Changed subject prefix to net-next

Subbaraya Sundeep (2):
  octeontx2-af: Add MACSEC capability flag
  octeontx2-pf: macsec: Get MACSEC capability flag from AF

 drivers/net/ethernet/marvell/octeontx2/af/mbox.h   |  2 ++
 drivers/net/ethernet/marvell/octeontx2/af/rvu.c    |  3 ++
 .../ethernet/marvell/octeontx2/nic/otx2_common.c   | 37 ++++++++++++++++++++++
 .../ethernet/marvell/octeontx2/nic/otx2_common.h   |  4 +--
 .../net/ethernet/marvell/octeontx2/nic/otx2_pf.c   |  2 ++
 5 files changed, 45 insertions(+), 3 deletions(-)

-- 
2.7.4

[net-next v2 PATCH 1/2] octeontx2-af: Add MACSEC capability flag

[Subbaraya Sundeep]

MACSEC block may be fused out on some silicons hence modify
get_hw_cap mailbox message to set a capability flag in its
response message based on MACSEC block availability.

Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com>
---
 drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 2 ++
 drivers/net/ethernet/marvell/octeontx2/af/rvu.c  | 3 +++
 2 files changed, 5 insertions(+)

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index 005ca8a..a213b26 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -524,6 +524,8 @@ struct get_hw_cap_rsp {
 	u8 nix_fixed_txschq_mapping; /* Schq mapping fixed or flexible */
 	u8 nix_shaping;		     /* Is shaping and coloring supported */
 	u8 npc_hash_extract;	/* Is hash extract supported */
+#define HW_CAP_MACSEC		BIT_ULL(1)
+	u64 hw_caps;
 };
 
 /* CGX mbox message formats */
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
index 6575c42..6e13ab2 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
@@ -2031,6 +2031,9 @@ int rvu_mbox_handler_get_hw_cap(struct rvu *rvu, struct msg_req *req,
 	rsp->nix_shaping = hw->cap.nix_shaping;
 	rsp->npc_hash_extract = hw->cap.npc_hash_extract;
 
+	if (rvu->mcs_blk_cnt)
+		rsp->hw_caps = HW_CAP_MACSEC;
+
 	return 0;
 }
 
-- 
2.7.4

[net-next v2 PATCH 2/2] octeontx2-pf: macsec: Get MACSEC capability flag from AF

[Subbaraya Sundeep]

The presence of MACSEC block is currently figured out based
on the running silicon variant. This may not be correct all
the times since the MACSEC block can be fused out. Hence get
the macsec info from AF via mailbox.

Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com>
---
 .../ethernet/marvell/octeontx2/nic/otx2_common.c   | 37 ++++++++++++++++++++++
 .../ethernet/marvell/octeontx2/nic/otx2_common.h   |  4 +--
 .../net/ethernet/marvell/octeontx2/nic/otx2_pf.c   |  2 ++
 3 files changed, 40 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
index 84cd029..6f57258 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
@@ -2055,6 +2055,43 @@ int otx2_handle_ntuple_tc_features(struct net_device *netdev, netdev_features_t
 }
 EXPORT_SYMBOL(otx2_handle_ntuple_tc_features);
 
+int otx2_set_hw_capabilities(struct otx2_nic *pfvf)
+{
+	struct mbox *mbox = &pfvf->mbox;
+	struct otx2_hw *hw = &pfvf->hw;
+	struct get_hw_cap_rsp *rsp;
+	struct msg_req *req;
+	int ret = -ENOMEM;
+
+	mutex_lock(&mbox->lock);
+
+	req = otx2_mbox_alloc_msg_get_hw_cap(mbox);
+	if (!req)
+		goto fail;
+
+	ret = otx2_sync_mbox_msg(mbox);
+	if (ret)
+		goto fail;
+
+	rsp = (struct get_hw_cap_rsp *)otx2_mbox_get_rsp(&pfvf->mbox.mbox,
+							 0, &req->hdr);
+	if (IS_ERR(rsp)) {
+		ret = -EINVAL;
+		goto fail;
+	}
+
+	if (rsp->hw_caps & HW_CAP_MACSEC)
+		__set_bit(CN10K_HW_MACSEC, &hw->cap_flag);
+
+	mutex_unlock(&mbox->lock);
+
+	return 0;
+fail:
+	dev_err(pfvf->dev, "Cannot get MACSEC capability from AF\n");
+	mutex_unlock(&mbox->lock);
+	return ret;
+}
+
 #define M(_name, _id, _fn_name, _req_type, _rsp_type)			\
 int __weak								\
 otx2_mbox_up_handler_ ## _fn_name(struct otx2_nic *pfvf,		\
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
index 7e3ddb0..7d0e39d 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
@@ -631,9 +631,6 @@ static inline void otx2_setup_dev_hw_settings(struct otx2_nic *pfvf)
 		__set_bit(CN10K_PTP_ONESTEP, &hw->cap_flag);
 		__set_bit(QOS_CIR_PIR_SUPPORT, &hw->cap_flag);
 	}
-
-	if (is_dev_cn10kb(pfvf->pdev))
-		__set_bit(CN10K_HW_MACSEC, &hw->cap_flag);
 }
 
 /* Register read/write APIs */
@@ -1043,6 +1040,7 @@ void otx2_disable_napi(struct otx2_nic *pf);
 irqreturn_t otx2_cq_intr_handler(int irq, void *cq_irq);
 int otx2_rq_init(struct otx2_nic *pfvf, u16 qidx, u16 lpb_aura);
 int otx2_cq_init(struct otx2_nic *pfvf, u16 qidx);
+int otx2_set_hw_capabilities(struct otx2_nic *pfvf);
 
 /* RSS configuration APIs*/
 int otx2_rss_init(struct otx2_nic *pfvf);
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
index 0aee8e3..a8ad4a2 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
@@ -3126,6 +3126,8 @@ static int otx2_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 	if (err)
 		goto err_ptp_destroy;
 
+	otx2_set_hw_capabilities(pf);
+
 	err = cn10k_mcs_init(pf);
 	if (err)
 		goto err_del_mcam_entries;
-- 
2.7.4

Re: [net-next v2 PATCH 2/2] octeontx2-pf: macsec: Get MACSEC capability flag from AF

[Simon Horman]

On Sun, May 11, 2025 at 06:52:47PM +0530, Subbaraya Sundeep wrote:
> The presence of MACSEC block is currently figured out based
> on the running silicon variant. This may not be correct all
> the times since the MACSEC block can be fused out. Hence get
> the macsec info from AF via mailbox.
> 
> Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com>

...

> diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
> index 7e3ddb0..7d0e39d 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
> +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
> @@ -631,9 +631,6 @@ static inline void otx2_setup_dev_hw_settings(struct otx2_nic *pfvf)
>  		__set_bit(CN10K_PTP_ONESTEP, &hw->cap_flag);
>  		__set_bit(QOS_CIR_PIR_SUPPORT, &hw->cap_flag);
>  	}
> -
> -	if (is_dev_cn10kb(pfvf->pdev))
> -		__set_bit(CN10K_HW_MACSEC, &hw->cap_flag);
>  }
>  
>  /* Register read/write APIs */
> @@ -1043,6 +1040,7 @@ void otx2_disable_napi(struct otx2_nic *pf);
>  irqreturn_t otx2_cq_intr_handler(int irq, void *cq_irq);
>  int otx2_rq_init(struct otx2_nic *pfvf, u16 qidx, u16 lpb_aura);
>  int otx2_cq_init(struct otx2_nic *pfvf, u16 qidx);
> +int otx2_set_hw_capabilities(struct otx2_nic *pfvf);
>  
>  /* RSS configuration APIs*/
>  int otx2_rss_init(struct otx2_nic *pfvf);
> diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
> index 0aee8e3..a8ad4a2 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
> +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
> @@ -3126,6 +3126,8 @@ static int otx2_probe(struct pci_dev *pdev, const struct pci_device_id *id)
>  	if (err)
>  		goto err_ptp_destroy;
>  
> +	otx2_set_hw_capabilities(pf);
> +
>  	err = cn10k_mcs_init(pf);
>  	if (err)
>  		goto err_del_mcam_entries;

Hi Subbaraya,

If I read things correctly otx2_setup_dev_hw_settings() is called
for both representors and non-representors, while otx2_probe is
only called for non-representors.

If so, my question is if this patch changes behaviour for representors.
And, again if so, if that is intentional.

Re: [net-next v2 PATCH 2/2] octeontx2-pf: macsec: Get MACSEC capability flag from AF

[Subbaraya Sundeep]

Hi Simon,

On 2025-05-12 at 16:37:32, Simon Horman (horms@kernel.org) wrote:
> On Sun, May 11, 2025 at 06:52:47PM +0530, Subbaraya Sundeep wrote:
> > The presence of MACSEC block is currently figured out based
> > on the running silicon variant. This may not be correct all
> > the times since the MACSEC block can be fused out. Hence get
> > the macsec info from AF via mailbox.
> > 
> > Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com>
> 
> ...
> 
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
> > index 7e3ddb0..7d0e39d 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
> > +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
> > @@ -631,9 +631,6 @@ static inline void otx2_setup_dev_hw_settings(struct otx2_nic *pfvf)
> >  		__set_bit(CN10K_PTP_ONESTEP, &hw->cap_flag);
> >  		__set_bit(QOS_CIR_PIR_SUPPORT, &hw->cap_flag);
> >  	}
> > -
> > -	if (is_dev_cn10kb(pfvf->pdev))
> > -		__set_bit(CN10K_HW_MACSEC, &hw->cap_flag);
> >  }
> >  
> >  /* Register read/write APIs */
> > @@ -1043,6 +1040,7 @@ void otx2_disable_napi(struct otx2_nic *pf);
> >  irqreturn_t otx2_cq_intr_handler(int irq, void *cq_irq);
> >  int otx2_rq_init(struct otx2_nic *pfvf, u16 qidx, u16 lpb_aura);
> >  int otx2_cq_init(struct otx2_nic *pfvf, u16 qidx);
> > +int otx2_set_hw_capabilities(struct otx2_nic *pfvf);
> >  
> >  /* RSS configuration APIs*/
> >  int otx2_rss_init(struct otx2_nic *pfvf);
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
> > index 0aee8e3..a8ad4a2 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
> > +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
> > @@ -3126,6 +3126,8 @@ static int otx2_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> >  	if (err)
> >  		goto err_ptp_destroy;
> >  
> > +	otx2_set_hw_capabilities(pf);
> > +
> >  	err = cn10k_mcs_init(pf);
> >  	if (err)
> >  		goto err_del_mcam_entries;
> 
> Hi Subbaraya,
> 
> If I read things correctly otx2_setup_dev_hw_settings() is called
> for both representors and non-representors, while otx2_probe is
> only called for non-representors.
> 
> If so, my question is if this patch changes behaviour for representors.
> And, again if so, if that is intentional.
I assume you mean VF driver for representors and PF driver for
non-representor. Yes this is intentional. We currently do not support
macscec offload on VFs hence I changed only PF driver. In case we want
to support macsec offload on VFs too then otx2vf_probe also need to be
changed like:
otx2_set_hw_capabilities(vf);
err = cn10k_mcs_init(vf);

Thanks,
Sundeep

Re: [net-next v2 PATCH 1/2] octeontx2-af: Add MACSEC capability flag

[Simon Horman]

On Sun, May 11, 2025 at 06:52:46PM +0530, Subbaraya Sundeep wrote:
> MACSEC block may be fused out on some silicons hence modify
> get_hw_cap mailbox message to set a capability flag in its
> response message based on MACSEC block availability.
> 
> Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com>

Reviewed-by: Simon Horman <horms@kernel.org>

Re: [net-next v2 PATCH 2/2] octeontx2-pf: macsec: Get MACSEC capability flag from AF

[Simon Horman]

On Tue, May 13, 2025 at 08:32:07AM +0000, Subbaraya Sundeep wrote:

Hi Subbaraya,

> Hi Simon,
> 
> On 2025-05-12 at 16:37:32, Simon Horman (horms@kernel.org) wrote:
> > On Sun, May 11, 2025 at 06:52:47PM +0530, Subbaraya Sundeep wrote:

...

> > Hi Subbaraya,
> > 
> > If I read things correctly otx2_setup_dev_hw_settings() is called
> > for both representors and non-representors, while otx2_probe is
> > only called for non-representors.
> > 
> > If so, my question is if this patch changes behaviour for representors.
> > And, again if so, if that is intentional.
> I assume you mean VF driver for representors and PF driver for
> non-representor. Yes this is intentional. We currently do not support
> macscec offload on VFs hence I changed only PF driver. In case we want
> to support macsec offload on VFs too then otx2vf_probe also need to be
> changed like:
> otx2_set_hw_capabilities(vf);
> err = cn10k_mcs_init(vf);

Thanks for the clarification.
In that case this patch looks good ti me.

Reviewed-by: Simon Horman <horms@kernel.org>