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From: Simon Horman <horms@kernel.org>
To: "Abdul Rahim, Faizal" <faizal.abdul.rahim@intel.com>
Cc: Tony Nguyen <anthony.l.nguyen@intel.com>,
	Przemek Kitszel <przemyslaw.kitszel@intel.com>,
	Andrew Lunn <andrew+netdev@lunn.ch>,
	"David S . Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Vladimir Oltean <vladimir.oltean@nxp.com>,
	intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Faizal Rahim <faizal.abdul.rahim@linux.intel.com>,
	Aleksandr Loktionov <aleksandr.loktionov@intel.com>,
	Chwee-Lin Choong <chwee.lin.choong@intel.com>
Subject: Re: [PATCH iwl-next v3 6/7] igc: add preemptible queue support in taprio
Date: Tue, 20 May 2025 09:18:05 +0100	[thread overview]
Message-ID: <20250520081805.GR365796@horms.kernel.org> (raw)
In-Reply-To: <20250519071911.2748406-7-faizal.abdul.rahim@intel.com>

On Mon, May 19, 2025 at 03:19:10AM -0400, Abdul Rahim, Faizal wrote:
> From: Faizal Rahim <faizal.abdul.rahim@linux.intel.com>
> 
> Changes:
> 1. Introduce tx_enabled flag to control preemptible queue. tx_enabled
>    is set via mmsv module based on multiple factors, including link
>    up/down status, to determine if FPE is active or inactive.
> 2. Add priority field to TXDCTL for express queue to improve data
>    fetch performance.
> 3. Block preemptible queue setup in taprio unless reverse-tsn-txq-prio
>    private flag is set. Encourages adoption of standard queue priority
>    scheme for new features.
> 4. Hardware-padded frames from preemptible queues result in incorrect
>    mCRC values, as padding bytes are excluded from the computation. Pad
>    frames to at least 60 bytes using skb_padto() before transmission to
>    ensure the hardware includes padding in the mCRC calculation.
> 
> Tested preemption with taprio by:
> 1. Enable FPE:
>    ethtool --set-mm enp1s0 pmac-enabled on tx-enabled on verify-enabled on
> 2. Enable private flag to reverse TX queue priority:
>    ethtool --set-priv-flags enp1s0 reverse-txq-prio on
> 3. Enable preemptible queue in taprio:
>    taprio num_tc 4 map 0 1 2 3 0 0 0 0 0 0 0 0 0 0 0 0 \
>    queues 1@0 1@1 1@2 1@3 \
>    fp P P P E
> 
> Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
> Co-developed-by: Chwee-Lin Choong <chwee.lin.choong@intel.com>
> Signed-off-by: Chwee-Lin Choong <chwee.lin.choong@intel.com>
> Signed-off-by: Faizal Rahim <faizal.abdul.rahim@linux.intel.com>

Reviewed-by: Simon Horman <horms@kernel.org>


  reply	other threads:[~2025-05-20  8:18 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-19  7:19 [PATCH iwl-next v3 0/7] igc: harmonize queue priority and add preemptible queue support Abdul Rahim, Faizal
2025-05-19  7:19 ` [PATCH iwl-next v3 1/7] igc: move TXDCTL and RXDCTL related macros Abdul Rahim, Faizal
2025-05-29  7:18   ` [Intel-wired-lan] " Mor Bar-Gabay
2025-05-19  7:19 ` [PATCH iwl-next v3 2/7] igc: add DCTL prefix to " Abdul Rahim, Faizal
2025-05-29  7:19   ` [Intel-wired-lan] " Mor Bar-Gabay
2025-05-19  7:19 ` [PATCH iwl-next v3 3/7] igc: refactor TXDCTL macros to use FIELD_PREP and GEN_MASK Abdul Rahim, Faizal
2025-05-29  7:20   ` [Intel-wired-lan] " Mor Bar-Gabay
2025-05-19  7:19 ` [PATCH iwl-next v3 4/7] igc: assign highest TX queue number as highest priority in mqprio Abdul Rahim, Faizal
2025-05-29  7:21   ` [Intel-wired-lan] " Mor Bar-Gabay
2025-05-19  7:19 ` [PATCH iwl-next v3 5/7] igc: add private flag to reverse TX queue priority in TSN mode Abdul Rahim, Faizal
2025-05-29  7:23   ` [Intel-wired-lan] " Mor Bar-Gabay
2025-05-19  7:19 ` [PATCH iwl-next v3 6/7] igc: add preemptible queue support in taprio Abdul Rahim, Faizal
2025-05-20  8:18   ` Simon Horman [this message]
2025-05-29  7:24   ` [Intel-wired-lan] " Mor Bar-Gabay
2025-05-19  7:19 ` [PATCH iwl-next v3 7/7] igc: add preemptible queue support in mqprio Abdul Rahim, Faizal
2025-05-20  8:18   ` Simon Horman
2025-05-29  7:25   ` [Intel-wired-lan] " Mor Bar-Gabay

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