On Fri, May 23, 2025 at 11:47:39AM -0400, Frank Li wrote: > Convert at86rf230.txt yaml format. > > Additional changes: > - Add ref to spi-peripheral-props.yaml. > - Add parent spi node in examples. > > Signed-off-by: Frank Li > --- > .../bindings/net/ieee802154/at86rf230.txt | 27 -------- > .../net/ieee802154/atmel,at86rf233.yaml | 65 +++++++++++++++++++ > 2 files changed, 65 insertions(+), 27 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/net/ieee802154/at86rf230.txt > create mode 100644 Documentation/devicetree/bindings/net/ieee802154/atmel,at86rf233.yaml > > diff --git a/Documentation/devicetree/bindings/net/ieee802154/at86rf230.txt b/Documentation/devicetree/bindings/net/ieee802154/at86rf230.txt > deleted file mode 100644 > index 168f1be509126..0000000000000 > --- a/Documentation/devicetree/bindings/net/ieee802154/at86rf230.txt > +++ /dev/null > @@ -1,27 +0,0 @@ > -* AT86RF230 IEEE 802.15.4 * > - > -Required properties: > - - compatible: should be "atmel,at86rf230", "atmel,at86rf231", > - "atmel,at86rf233" or "atmel,at86rf212" > - - spi-max-frequency: maximal bus speed, should be set to 7500000 depends > - sync or async operation mode > - - reg: the chipselect index > - - interrupts: the interrupt generated by the device. Non high-level > - can occur deadlocks while handling isr. > - > -Optional properties: > - - reset-gpio: GPIO spec for the rstn pin > - - sleep-gpio: GPIO spec for the slp_tr pin > - - xtal-trim: u8 value for fine tuning the internal capacitance > - arrays of xtal pins: 0 = +0 pF, 0xf = +4.5 pF > - > -Example: > - > - at86rf231@0 { > - compatible = "atmel,at86rf231"; > - spi-max-frequency = <7500000>; > - reg = <0>; > - interrupts = <19 4>; > - interrupt-parent = <&gpio3>; > - xtal-trim = /bits/ 8 <0x06>; > - }; > diff --git a/Documentation/devicetree/bindings/net/ieee802154/atmel,at86rf233.yaml b/Documentation/devicetree/bindings/net/ieee802154/atmel,at86rf233.yaml > new file mode 100644 > index 0000000000000..275e5e4677a46 > --- /dev/null > +++ b/Documentation/devicetree/bindings/net/ieee802154/atmel,at86rf233.yaml > @@ -0,0 +1,65 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/net/ieee802154/atmel,at86rf233.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: AT86RF230 IEEE 802.15.4 > + > +maintainers: > + - Frank Li > + > +properties: > + compatible: > + enum: > + - atmel,at86rf212 > + - atmel,at86rf230 > + - atmel,at86rf231 > + - atmel,at86rf233 > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + reset-gpio: > + maxItems: 1 > + > + sleep-gpio: > + maxItems: 1 > + > + spi-max-frequency: > + maximum: 7500000 > + > + xtal-trim: > + $ref: /schemas/types.yaml#/definitions/uint8-array I think this is just uint8, not an array of uint8s (in which case you'd be missing constraints on how many?) > + description: | > + u8 value for fine tuning the internal capacitance > + arrays of xtal pins: 0 = +0 pF, 0xf = +4.5 pF > + > +required: > + - compatible > + - reg > + - interrupts > + > +allOf: > + - $ref: /schemas/spi/spi-peripheral-props.yaml# > + > +unevaluatedProperties: false > + > +examples: > + - | > + spi { > + #address-cells = <1>; > + #size-cells = <0>; > + > + zigbee@0 { > + compatible = "atmel,at86rf231"; > + reg = <0>; > + spi-max-frequency = <7500000>; > + interrupts = <19 4>; > + interrupt-parent = <&gpio3>; > + xtal-trim = /bits/ 8 <0x06>; > + }; > + }; > -- > 2.34.1 >