[RFC PATCH net-next 0/6] net: dsa: b53: mmap: Add bcm63xx EPHY power and reset control

[RFC PATCH net-next 0/6] net: dsa: b53: mmap: Add bcm63xx EPHY power and reset control

[Kyle Hendry]

Some bcm63268 bootloaders hold the fast ethernet phys in reset 
causing an error when they're probed. The resets are controlled 
by a register in the gpio controller, and would need a minimal 
driver to set. However, that register also controls the 
power states of the EPHYs. I'm trying to implement both 
functionalities at the same time to make sure that they don't 
interfere with eachother. These patches allow control of the 
ephy register from the b53 switch driver. 

Is this the right place for this code, or should it be in a 
power domain? Should the resets be handled by a separate reset
controller?

Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>

Kyle Hendry (6):
  net: dsa: b53: Add phy_enable(), phy_disable() methods
  net: dsa: b53: mmap: Add reference to bcm63xx gpio controller
  dt-bindings: net: dsa: b53: Document brcm,gpio-ctrl property
  net: dsa: b53: mmap: Add register layout for bcm63268
  net: dsa: b53: mmap: Clear resets on bcm63xx EPHYs
  net: dsa: b53: mmap: Implement bcm63xx ephy power control

 .../devicetree/bindings/net/dsa/brcm,b53.yaml |  5 +
 drivers/net/dsa/b53/b53_common.c              |  6 ++
 drivers/net/dsa/b53/b53_mmap.c                | 99 ++++++++++++++++++-
 drivers/net/dsa/b53/b53_priv.h                |  2 +
 4 files changed, 111 insertions(+), 1 deletion(-)

-- 
2.43.0

[RFC PATCH net-next 1/6] net: dsa: b53: Add phy_enable(), phy_disable() methods

[Kyle Hendry]

Add phy enable/disable to b53 ops to be called when
enabling/disabling ports.

Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>
---
 drivers/net/dsa/b53/b53_common.c | 6 ++++++
 drivers/net/dsa/b53/b53_priv.h   | 2 ++
 2 files changed, 8 insertions(+)

diff --git a/drivers/net/dsa/b53/b53_common.c b/drivers/net/dsa/b53/b53_common.c
index 46978757c972..77acc7b8abfb 100644
--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
@@ -689,6 +689,9 @@ int b53_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy)
 
 	cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
 
+	if (dev->ops->phy_enable)
+		dev->ops->phy_enable(dev, port);
+
 	if (dev->ops->irq_enable)
 		ret = dev->ops->irq_enable(dev, port);
 	if (ret)
@@ -727,6 +730,9 @@ void b53_disable_port(struct dsa_switch *ds, int port)
 	reg |= PORT_CTRL_RX_DISABLE | PORT_CTRL_TX_DISABLE;
 	b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), reg);
 
+	if (dev->ops->phy_disable)
+		dev->ops->phy_disable(dev, port);
+
 	if (dev->ops->irq_disable)
 		dev->ops->irq_disable(dev, port);
 }
diff --git a/drivers/net/dsa/b53/b53_priv.h b/drivers/net/dsa/b53/b53_priv.h
index b1b9e8882ba4..f1124f5e50da 100644
--- a/drivers/net/dsa/b53/b53_priv.h
+++ b/drivers/net/dsa/b53/b53_priv.h
@@ -45,6 +45,8 @@ struct b53_io_ops {
 	int (*phy_write16)(struct b53_device *dev, int addr, int reg, u16 value);
 	int (*irq_enable)(struct b53_device *dev, int port);
 	void (*irq_disable)(struct b53_device *dev, int port);
+	void (*phy_enable)(struct b53_device *dev, int port);
+	void (*phy_disable)(struct b53_device *dev, int port);
 	void (*phylink_get_caps)(struct b53_device *dev, int port,
 				 struct phylink_config *config);
 	struct phylink_pcs *(*phylink_mac_select_pcs)(struct b53_device *dev,
-- 
2.43.0

[RFC PATCH net-next 2/6] net: dsa: b53: mmap: Add reference to bcm63xx gpio controller

[Kyle Hendry]

On bcm63xx SoCs there are registers that control the PHYs in
the GPIO controller. Allow the b53 driver to access them
by passing in the syscon through the device tree.

Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>
---
 drivers/net/dsa/b53/b53_mmap.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/dsa/b53/b53_mmap.c b/drivers/net/dsa/b53/b53_mmap.c
index c687360a5b7f..a0c06d703861 100644
--- a/drivers/net/dsa/b53/b53_mmap.c
+++ b/drivers/net/dsa/b53/b53_mmap.c
@@ -21,6 +21,7 @@
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/io.h>
+#include <linux/mfd/syscon.h>
 #include <linux/platform_device.h>
 #include <linux/platform_data/b53.h>
 
@@ -28,6 +29,7 @@
 
 struct b53_mmap_priv {
 	void __iomem *regs;
+	struct regmap *gpio_ctrl;
 };
 
 static int b53_mmap_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)
@@ -313,6 +315,8 @@ static int b53_mmap_probe(struct platform_device *pdev)
 
 	priv->regs = pdata->regs;
 
+	priv->gpio_ctrl = syscon_regmap_lookup_by_phandle(np, "brcm,gpio-ctrl");
+
 	dev = b53_switch_alloc(&pdev->dev, &b53_mmap_ops, priv);
 	if (!dev)
 		return -ENOMEM;
-- 
2.43.0

[RFC PATCH net-next 3/6] dt-bindings: net: dsa: b53: Document brcm,gpio-ctrl property

[Kyle Hendry]

Add description for bcm63xx gpio-ctrl phandle

Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>
---
 Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml b/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml
index d6c957a33b48..c40ebd1ddffb 100644
--- a/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml
+++ b/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml
@@ -66,6 +66,11 @@ properties:
               - brcm,bcm63268-switch
           - const: brcm,bcm63xx-switch
 
+  brcm,gpio-ctrl:
+    description:
+      A phandle to the syscon node of the bcm63xx gpio controller
+    $ref: /schemas/types.yaml#/definitions/phandle
+
 required:
   - compatible
   - reg
-- 
2.43.0

Re: [RFC PATCH net-next 3/6] dt-bindings: net: dsa: b53: Document brcm,gpio-ctrl property

[Rob Herring]

On Fri, Jun 20, 2025 at 06:41:18AM -0700, Kyle Hendry wrote:
> Add description for bcm63xx gpio-ctrl phandle
> 
> Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>
> ---
>  Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml b/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml
> index d6c957a33b48..c40ebd1ddffb 100644
> --- a/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml
> +++ b/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml
> @@ -66,6 +66,11 @@ properties:
>                - brcm,bcm63268-switch
>            - const: brcm,bcm63xx-switch
>  
> +  brcm,gpio-ctrl:
> +    description:
> +      A phandle to the syscon node of the bcm63xx gpio controller
> +    $ref: /schemas/types.yaml#/definitions/phandle

GPIO? Why aren't you using the GPIO binding?

> +
>  required:
>    - compatible
>    - reg
> -- 
> 2.43.0
> 

[RFC PATCH net-next 4/6] net: dsa: b53: mmap: Add register layout for bcm63268

[Kyle Hendry]

Add a structure to describe the ephy control register.
Add table with single entry for bcm63268. When probing,
try to match table entry with the chip_id.

Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>
---
 drivers/net/dsa/b53/b53_mmap.c | 32 +++++++++++++++++++++++++++++++-
 1 file changed, 31 insertions(+), 1 deletion(-)

diff --git a/drivers/net/dsa/b53/b53_mmap.c b/drivers/net/dsa/b53/b53_mmap.c
index a0c06d703861..1bebf5b9826b 100644
--- a/drivers/net/dsa/b53/b53_mmap.c
+++ b/drivers/net/dsa/b53/b53_mmap.c
@@ -27,9 +27,31 @@
 
 #include "b53_priv.h"
 
+struct b53_phy_info {
+	u32 chip_id;
+	u32 mask;
+	u32 num_ephy;
+	const u32 *ephy_offset;
+};
+
 struct b53_mmap_priv {
 	void __iomem *regs;
 	struct regmap *gpio_ctrl;
+	const struct b53_phy_info *phy_info;
+};
+
+static const u32 bcm63268_ephy_offsets[] = {4, 9, 14};
+
+static const struct b53_phy_info bcm63xx_ephy_info[] = {
+	{
+		/* 6318 has different reg layout,
+		 * need to distinguish it somehow
+		 */
+		.chip_id = BCM63268_DEVICE_ID,
+		.mask = GENMASK(4, 0),
+		.num_ephy = ARRAY_SIZE(bcm63268_ephy_offsets),
+		.ephy_offset = bcm63268_ephy_offsets,
+	}
 };
 
 static int b53_mmap_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)
@@ -296,7 +318,7 @@ static int b53_mmap_probe(struct platform_device *pdev)
 	struct b53_platform_data *pdata = pdev->dev.platform_data;
 	struct b53_mmap_priv *priv;
 	struct b53_device *dev;
-	int ret;
+	int i, ret;
 
 	if (!pdata && np) {
 		ret = b53_mmap_probe_of(pdev, &pdata);
@@ -316,6 +338,14 @@ static int b53_mmap_probe(struct platform_device *pdev)
 	priv->regs = pdata->regs;
 
 	priv->gpio_ctrl = syscon_regmap_lookup_by_phandle(np, "brcm,gpio-ctrl");
+	if (!IS_ERR(priv->gpio_ctrl)) {
+		for (i = 0; i < ARRAY_SIZE(bcm63xx_ephy_info); i++) {
+			if (bcm63xx_ephy_info[i].chip_id == pdata->chip_id) {
+				priv->phy_info = &bcm63xx_ephy_info[i];
+				break;
+			}
+		}
+	}
 
 	dev = b53_switch_alloc(&pdev->dev, &b53_mmap_ops, priv);
 	if (!dev)
-- 
2.43.0

[RFC PATCH net-next 5/6] net: dsa: b53: mmap: Clear resets on bcm63xx EPHYs

[Kyle Hendry]

Make sure the ephy resets aren't being held by setting
lowest bits in ephy control register.

Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>
---
 drivers/net/dsa/b53/b53_mmap.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/net/dsa/b53/b53_mmap.c b/drivers/net/dsa/b53/b53_mmap.c
index 1bebf5b9826b..a4a2f2965bcc 100644
--- a/drivers/net/dsa/b53/b53_mmap.c
+++ b/drivers/net/dsa/b53/b53_mmap.c
@@ -24,9 +24,12 @@
 #include <linux/mfd/syscon.h>
 #include <linux/platform_device.h>
 #include <linux/platform_data/b53.h>
+#include <linux/regmap.h>
 
 #include "b53_priv.h"
 
+#define BCM63XX_EPHY_REG 0x3C
+
 struct b53_phy_info {
 	u32 chip_id;
 	u32 mask;
@@ -253,6 +256,14 @@ static int b53_mmap_phy_write16(struct b53_device *dev, int addr, int reg,
 	return -EIO;
 }
 
+static void bcm63xx_ephy_reset(struct regmap *regmap, int num_ephy)
+{
+	u32 mask = GENMASK((num_ephy - 1), 0);
+
+	/* Set lowest bits to deassert resets */
+	regmap_update_bits(regmap, BCM63XX_EPHY_REG, mask, mask);
+}
+
 static const struct b53_io_ops b53_mmap_ops = {
 	.read8 = b53_mmap_read8,
 	.read16 = b53_mmap_read16,
@@ -345,6 +356,8 @@ static int b53_mmap_probe(struct platform_device *pdev)
 				break;
 			}
 		}
+		if (priv->phy_info)
+			bcm63xx_ephy_reset(priv->gpio_ctrl, priv->phy_info->num_ephy);
 	}
 
 	dev = b53_switch_alloc(&pdev->dev, &b53_mmap_ops, priv);
-- 
2.43.0

[RFC PATCH net-next 6/6] net: dsa: b53: mmap: Implement bcm63xx ephy power control

[Kyle Hendry]

Implement the phy enable/disable calls for b53 mmap, and
set the power down registers in the ephy control register
appropriately.

Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>
---
 drivers/net/dsa/b53/b53_mmap.c | 50 ++++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/drivers/net/dsa/b53/b53_mmap.c b/drivers/net/dsa/b53/b53_mmap.c
index a4a2f2965bcc..cf34a7d1048f 100644
--- a/drivers/net/dsa/b53/b53_mmap.c
+++ b/drivers/net/dsa/b53/b53_mmap.c
@@ -29,6 +29,7 @@
 #include "b53_priv.h"
 
 #define BCM63XX_EPHY_REG 0x3C
+#define BCM63XX_EPHY_POWER_DOWN_BIAS BIT(24)
 
 struct b53_phy_info {
 	u32 chip_id;
@@ -264,6 +265,53 @@ static void bcm63xx_ephy_reset(struct regmap *regmap, int num_ephy)
 	regmap_update_bits(regmap, BCM63XX_EPHY_REG, mask, mask);
 }
 
+static void bcm63xx_ephy_set(struct b53_device *dev, int port, bool enable)
+{
+	struct b53_mmap_priv *priv = dev->priv;
+	const struct b53_phy_info *info = priv->phy_info;
+	u32 val, mask;
+	int i;
+
+	if (enable) {
+		val = 0;
+		mask = (info->mask << info->ephy_offset[port])
+				| BCM63XX_EPHY_POWER_DOWN_BIAS;
+		regmap_update_bits(priv->gpio_ctrl, BCM63XX_EPHY_REG, mask, val);
+	} else {
+		if (!regmap_read(priv->gpio_ctrl, BCM63XX_EPHY_REG, &val)) {
+			val |= info->mask << info->ephy_offset[port];
+			/*Check if all phys are full off and set bias bit*/
+			for (i = 0; i < info->num_ephy; i++) {
+				mask = info->mask << info->ephy_offset[i];
+				if ((val & mask) != mask)
+					break;
+			}
+
+			if (i == info->num_ephy)
+				val |= BCM63XX_EPHY_POWER_DOWN_BIAS;
+
+			/*Might need a lock around the read/write*/
+			regmap_write(priv->gpio_ctrl, BCM63XX_EPHY_REG, val);
+		}
+	}
+}
+
+static void b53_mmap_phy_enable(struct b53_device *dev, int port)
+{
+	struct b53_mmap_priv *priv = dev->priv;
+
+	if (priv->phy_info && port < priv->phy_info->num_ephy)
+		bcm63xx_ephy_set(dev, port, true);
+}
+
+static void b53_mmap_phy_disable(struct b53_device *dev, int port)
+{
+	struct b53_mmap_priv *priv = dev->priv;
+
+	if (priv->phy_info && port < priv->phy_info->num_ephy)
+		bcm63xx_ephy_set(dev, port, false);
+}
+
 static const struct b53_io_ops b53_mmap_ops = {
 	.read8 = b53_mmap_read8,
 	.read16 = b53_mmap_read16,
@@ -277,6 +325,8 @@ static const struct b53_io_ops b53_mmap_ops = {
 	.write64 = b53_mmap_write64,
 	.phy_read16 = b53_mmap_phy_read16,
 	.phy_write16 = b53_mmap_phy_write16,
+	.phy_enable = b53_mmap_phy_enable,
+	.phy_disable = b53_mmap_phy_disable,
 };
 
 static int b53_mmap_probe_of(struct platform_device *pdev,
-- 
2.43.0

Re: [RFC PATCH net-next 0/6] net: dsa: b53: mmap: Add bcm63xx EPHY power and reset control

[Florian Fainelli]

On 6/20/25 06:41, Kyle Hendry wrote:
> Some bcm63268 bootloaders hold the fast ethernet phys in reset
> causing an error when they're probed. The resets are controlled
> by a register in the gpio controller, and would need a minimal
> driver to set. However, that register also controls the
> power states of the EPHYs. I'm trying to implement both
> functionalities at the same time to make sure that they don't
> interfere with eachother. These patches allow control of the
> ephy register from the b53 switch driver.
> 
> Is this the right place for this code, or should it be in a
> power domain? Should the resets be handled by a separate reset
> controller?

Good question, it seems like a reset controller might work with one 
reset per port being defined? Unfortunately the register in the GPIO 
controller is not logically part of a GPIO interface, it's just where it 
landed because that was convenient for the designer.
-- 
Florian