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From: Maxime Chevallier <maxime.chevallier@bootlin.com>
To: Florian Fainelli <florian.fainelli@broadcom.com>
Cc: netdev@vger.kernel.org, "Andrew Lunn" <andrew@lunn.ch>,
	"Russell King (Oracle)" <linux@armlinux.org.uk>,
	"Vladimir Oltean" <vladimir.oltean@nxp.com>,
	"Marek Behún" <kabel@kernel.org>,
	"Robert Hancock" <robert.hancock@calian.com>,
	"Tao Ren" <rentao.bupt@gmail.com>
Subject: Re: Supporting SGMII to 100BaseFX SFP modules, with broadcom PHYs
Date: Wed, 25 Jun 2025 09:15:06 +0200	[thread overview]
Message-ID: <20250625091506.051a8723@fedora.home> (raw)
In-Reply-To: <24146e10-5e9c-42f5-9bbe-fe69ddb01d95@broadcom.com>

Hi again Florian,

On Tue, 24 Jun 2025 15:29:25 -0700
Florian Fainelli <florian.fainelli@broadcom.com> wrote:

> For 100BaseFX, the signal detection is configured in bit 5 of the shadow 
> 0b01100 in the 0x1C register. You can use bcm_{read,write}_shadow() for 
> that:
> 
> 0 to use EN_10B/SD as CMOS/TTL signal detect (default)
> 1 to use SD_100FX± as PECL signal detect
> 
> You can use either copper or SGMII interface for 100BaseFX and that will 
> be configured this way:
> 
> - in register 0x1C, shadow 0b10 (1000Base-T/100Base-TX/10Base-T Spare 
> Control 1), set bit 4 to 1 to enable 100BaseFX
> 
> - disable auto-negotiation with register 0x00 = 0x2100
> 
> - set register 0x18 to 0x430 (bit 10 -> normal mode, bits 5:4 control 
> the edge rate. 0b00 -> 4ns, 0b01 -> 5ns, 0b10 -> 3ns, 0b11 -> 0ns. This 
> is the auxiliary control register (MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL).

And I have my first ping going through :) Thank you so much, if I get a
chance to meet you in person one day, drinks are on me :)

Thanks again,

Maxime

  parent reply	other threads:[~2025-06-25  7:15 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-24 21:39 Supporting SGMII to 100BaseFX SFP modules, with broadcom PHYs Maxime Chevallier
2025-06-24 22:29 ` Florian Fainelli
2025-06-25  5:54   ` Maxime Chevallier
2025-06-25  7:15   ` Maxime Chevallier [this message]
2025-06-25 15:33     ` Florian Fainelli

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