From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: <alejandro.lucero-palau@amd.com>
Cc: <linux-cxl@vger.kernel.org>, <netdev@vger.kernel.org>,
<dan.j.williams@intel.com>, <edward.cree@amd.com>,
<davem@davemloft.net>, <kuba@kernel.org>, <pabeni@redhat.com>,
<edumazet@google.com>, <dave.jiang@intel.com>,
Alejandro Lucero <alucerop@amd.com>,
"Alison Schofield" <alison.schofield@intel.com>
Subject: Re: [PATCH v17 01/22] cxl: Add type2 device basic support
Date: Wed, 25 Jun 2025 15:06:28 +0100 [thread overview]
Message-ID: <20250625150628.00002255@huawei.com> (raw)
In-Reply-To: <20250624141355.269056-2-alejandro.lucero-palau@amd.com>
On Tue, 24 Jun 2025 15:13:34 +0100
<alejandro.lucero-palau@amd.com> wrote:
> From: Alejandro Lucero <alucerop@amd.com>
>
> Differentiate CXL memory expanders (type 3) from CXL device accelerators
> (type 2) with a new function for initializing cxl_dev_state and a macro
> for helping accel drivers to embed cxl_dev_state inside a private
> struct.
>
> Move structs to include/cxl as the size of the accel driver private
> struct embedding cxl_dev_state needs to know the size of this struct.
>
> Use same new initialization with the type3 pci driver.
>
> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> Reviewed-by: Alison Schofield <alison.schofield@intel.com>
Hi Alejandro,
A few really minor comments inline.
> ---
> drivers/cxl/core/mbox.c | 12 +-
> drivers/cxl/core/memdev.c | 32 +++++
> drivers/cxl/core/pci.c | 1 +
> drivers/cxl/core/regs.c | 1 +
> drivers/cxl/cxl.h | 97 +--------------
> drivers/cxl/cxlmem.h | 85 +------------
> drivers/cxl/cxlpci.h | 21 ----
> drivers/cxl/pci.c | 17 +--
> include/cxl/cxl.h | 226 +++++++++++++++++++++++++++++++++++
> include/cxl/pci.h | 23 ++++
> tools/testing/cxl/test/mem.c | 3 +-
> 11 files changed, 303 insertions(+), 215 deletions(-)
> create mode 100644 include/cxl/cxl.h
> create mode 100644 include/cxl/pci.h
>
> diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c
> index d72764056ce6..d78f6039f997 100644
> --- a/drivers/cxl/core/mbox.c
> +++ b/drivers/cxl/core/mbox.c
> @@ -1484,23 +1484,21 @@ int cxl_mailbox_init(struct cxl_mailbox *cxl_mbox, struct device *host)
> }
> EXPORT_SYMBOL_NS_GPL(cxl_mailbox_init, "CXL");
>
> -struct cxl_memdev_state *cxl_memdev_state_create(struct device *dev)
> +struct cxl_memdev_state *cxl_memdev_state_create(struct device *dev, u64 serial,
> + u16 dvsec)
> {
> struct cxl_memdev_state *mds;
> int rc;
>
> - mds = devm_kzalloc(dev, sizeof(*mds), GFP_KERNEL);
> + mds = devm_cxl_dev_state_create(dev, CXL_DEVTYPE_CLASSMEM, serial,
> + dvsec, struct cxl_memdev_state, cxlds,
> + true);
> diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
> index 3ec6b906371b..9cc4337cacfb 100644
> --- a/drivers/cxl/cxlmem.h
> +++ b/drivers/cxl/cxlmem.h
> @@ -7,6 +7,7 @@
> #include <linux/cdev.h>
> #include <linux/uuid.h>
> #include <linux/node.h>
Is node still used in here? If the includes was just for
struct access_coordinates then that is now gone from this file.
> +#include <cxl/cxl.h>
> #include <cxl/event.h>
> #include <cxl/mailbox.h>
> #include "cxl.h"
> @@ -357,87 +358,6 @@ struct cxl_security_state {
> struct kernfs_node *sanitize_node;
> };
> diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
> index 785aa2af5eaa..0d3c67867965 100644
> --- a/drivers/cxl/pci.c
> +++ b/drivers/cxl/pci.c
> @@ -924,19 +927,19 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> return rc;
> pci_set_master(pdev);
>
> - mds = cxl_memdev_state_create(&pdev->dev);
> + dvsec = pci_find_dvsec_capability(pdev, PCI_VENDOR_ID_CXL,
> + CXL_DVSEC_PCIE_DEVICE);
> + if (!dvsec)
> + dev_warn(&pdev->dev,
> + "Device DVSEC not present, skip CXL.mem init\n");
Could use pci_warn(pdev, "..."); Not particularly important.
> +
> + mds = cxl_memdev_state_create(&pdev->dev, pci_get_dsn(pdev), dvsec);
Jonathan
next prev parent reply other threads:[~2025-06-25 14:06 UTC|newest]
Thread overview: 112+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-24 14:13 [PATCH v17 00/22] Type2 device basic support alejandro.lucero-palau
2025-06-24 14:13 ` [PATCH v17 01/22] cxl: Add type2 " alejandro.lucero-palau
2025-06-25 14:06 ` Jonathan Cameron [this message]
2025-06-30 14:38 ` Alejandro Lucero Palau
2025-07-25 21:46 ` dan.j.williams
2025-08-05 10:45 ` Alejandro Lucero Palau
2025-08-05 15:14 ` Dave Jiang
2025-06-24 14:13 ` [PATCH v17 02/22] sfc: add cxl support alejandro.lucero-palau
2025-06-25 16:37 ` Jonathan Cameron
2025-06-30 14:52 ` Alejandro Lucero Palau
2025-06-30 14:55 ` Alejandro Lucero Palau
2025-06-30 16:07 ` Jonathan Cameron
2025-07-25 22:16 ` dan.j.williams
2025-08-06 8:37 ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 03/22] cxl: Move pci generic code alejandro.lucero-palau
2025-07-25 22:41 ` dan.j.williams
2025-08-06 8:46 ` Alejandro Lucero Palau
2025-08-06 9:31 ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 04/22] cxl: allow Type2 drivers to map cxl component regs alejandro.lucero-palau
2025-06-27 8:27 ` Jonathan Cameron
2025-07-25 22:55 ` dan.j.williams
2025-07-28 16:23 ` Dave Jiang
2025-08-06 9:43 ` Alejandro Lucero Palau
2025-08-06 9:41 ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 05/22] sfc: setup cxl component regs and set media ready alejandro.lucero-palau
2025-06-27 8:39 ` Jonathan Cameron
2025-06-30 15:57 ` Alejandro Lucero Palau
2025-08-08 13:11 ` Alejandro Lucero Palau
2025-06-27 8:45 ` Jonathan Cameron
2025-08-08 13:14 ` Alejandro Lucero Palau
2025-07-25 23:04 ` dan.j.williams
2025-06-24 14:13 ` [PATCH v17 06/22] cxl: Support dpa initialization without a mailbox alejandro.lucero-palau
2025-06-27 8:42 ` Jonathan Cameron
2025-06-27 16:43 ` Dave Jiang
2025-07-01 15:23 ` Alejandro Lucero Palau
2025-06-27 8:43 ` Jonathan Cameron
2025-07-01 15:25 ` Alejandro Lucero Palau
2025-07-26 0:54 ` dan.j.williams
2025-06-24 14:13 ` [PATCH v17 07/22] sfc: initialize dpa alejandro.lucero-palau
2025-07-26 0:55 ` dan.j.williams
2025-08-08 16:59 ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 08/22] cxl: Prepare memdev creation for type2 alejandro.lucero-palau
2025-07-26 1:05 ` dan.j.williams
2025-08-08 17:01 ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 09/22] sfc: create type2 cxl memdev alejandro.lucero-palau
2025-06-27 8:51 ` Jonathan Cameron
2025-07-01 15:30 ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 10/22] cx/memdev: Indicate probe deferral alejandro.lucero-palau
2025-06-27 8:59 ` Jonathan Cameron
2025-06-27 9:42 ` Jonathan Cameron
2025-07-01 15:30 ` Alejandro Lucero Palau
2025-06-27 18:17 ` Dave Jiang
2025-06-30 16:20 ` Jonathan Cameron
2025-07-01 16:07 ` Alejandro Lucero Palau
2025-07-01 16:25 ` Dave Jiang
2025-07-01 16:44 ` Jonathan Cameron
2025-07-01 16:02 ` Alejandro Lucero Palau
2025-07-28 17:45 ` dan.j.williams
2025-07-30 3:46 ` dan.j.williams
2025-08-09 11:24 ` Alejandro Lucero Palau
2025-07-16 22:52 ` Dave Jiang
2025-06-24 14:13 ` [PATCH v17 11/22] cxl: Define a driver interface for HPA free space enumeration alejandro.lucero-palau
2025-06-27 22:42 ` Dave Jiang
2025-07-04 14:45 ` Alejandro Lucero Palau
2025-08-05 16:14 ` dan.j.williams
2025-08-11 12:04 ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 12/22] sfc: get endpoint decoder alejandro.lucero-palau
2025-06-27 9:10 ` Jonathan Cameron
2025-07-04 14:51 ` Alejandro Lucero Palau
2025-07-28 16:30 ` dan.j.williams
2025-08-11 14:24 ` Alejandro Lucero Palau
2025-09-02 7:11 ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 13/22] cxl: Define a driver interface for DPA allocation alejandro.lucero-palau
2025-06-27 9:06 ` Jonathan Cameron
2025-07-04 15:18 ` Alejandro Lucero Palau
2025-06-27 20:46 ` Dave Jiang
2025-07-04 15:21 ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 14/22] sfc: get endpoint decoder alejandro.lucero-palau
2025-06-27 9:11 ` Jonathan Cameron
2025-07-07 11:24 ` Alejandro Lucero Palau
2025-07-16 23:48 ` Dave Jiang
2025-06-24 14:13 ` [PATCH v17 15/22] cxl: Make region type based on endpoint type alejandro.lucero-palau
2025-09-03 17:20 ` Davidlohr Bueso
2025-06-24 14:13 ` [PATCH v17 16/22] cxl/region: Factor out interleave ways setup alejandro.lucero-palau
2025-06-27 9:13 ` Jonathan Cameron
2025-06-27 23:05 ` Dave Jiang
2025-06-30 16:20 ` Jonathan Cameron
2025-06-30 16:34 ` Dave Jiang
2025-06-24 14:13 ` [PATCH v17 17/22] cxl/region: Factor out interleave granularity setup alejandro.lucero-palau
2025-06-24 14:13 ` [PATCH v17 18/22] cxl: Allow region creation by type2 drivers alejandro.lucero-palau
2025-06-27 9:32 ` Jonathan Cameron
2025-07-07 11:31 ` Alejandro Lucero Palau
2025-08-05 16:33 ` dan.j.williams
2025-08-11 14:45 ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 19/22] cxl: Avoid dax creation for accelerators alejandro.lucero-palau
2025-06-27 9:33 ` Jonathan Cameron
2025-09-03 17:24 ` Davidlohr Bueso
2025-06-24 14:13 ` [PATCH v17 20/22] sfc: create cxl region alejandro.lucero-palau
2025-06-27 9:38 ` Jonathan Cameron
2025-07-07 11:37 ` Alejandro Lucero Palau
2025-07-28 16:20 ` dan.j.williams
2025-08-11 14:38 ` Alejandro Lucero Palau
2025-06-24 14:13 ` [PATCH v17 21/22] cxl: Add function for obtaining region range alejandro.lucero-palau
2025-06-24 14:13 ` [PATCH v17 22/22] sfc: support pio mapping based on cxl alejandro.lucero-palau
2025-06-27 9:46 ` Jonathan Cameron
2025-07-07 12:06 ` Alejandro Lucero Palau
2025-08-27 17:26 ` ALOK TIWARI
2025-07-25 20:51 ` [PATCH v17 00/22] Type2 device basic support dan.j.williams
2025-07-25 21:11 ` dan.j.williams
2025-08-27 16:48 ` PJ Waskiewicz
2025-08-28 8:02 ` Alejandro Lucero Palau
2025-09-04 17:48 ` PJ Waskiewicz
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