From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mout-p-201.mailbox.org (mout-p-201.mailbox.org [80.241.56.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7732F2D7394; Sun, 24 Aug 2025 22:08:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=80.241.56.171 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756073300; cv=none; b=mL3NvOfRJOp/GEJwHtpK6mgZreo8OFCDAQSByGP0mKskU8Lhfqg97ONSnHIyyovuNTlUBxuZNpi4lREKTWP0ismbG3jA4AcR8go5hLDRP2KMMil4zKKoZ1FtQXEaC6oWj09BL91m8xTngvrlnye3FWyRtwUBjFXYstnoV2fUsBI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756073300; c=relaxed/simple; bh=dp1+oyecjrvZXoUhcfljxuGXUjYuQPIUyYKPquZZUx8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=lQBgdp6HQDD+WQ0hW4iSmXd9tLCJ9PEyxsUwRIMJ6hF+qHqUtzjhhhlTQcOgYtlaGaBf4oLNUi/RpF1Bz7wP3VDMbZcndtjV/jwlGncsb2LS8DsdO2s9IeRBxRNSy2y+/mlGf41WhkJsj+A7tfI/SXq+ZwtU8rW1DZC4Klb0O1g= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mailbox.org; spf=pass smtp.mailfrom=mailbox.org; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b=U3jJj9+l; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b=gFH5W9Vc; arc=none smtp.client-ip=80.241.56.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mailbox.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mailbox.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b="U3jJj9+l"; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b="gFH5W9Vc" Received: from smtp102.mailbox.org (smtp102.mailbox.org [10.196.197.102]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-201.mailbox.org (Postfix) with ESMTPS id 4c97NC225Gz9sbl; Mon, 25 Aug 2025 00:08:11 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1756073291; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WZBezixw7X2X3S/CeQTQEH5TnKdhiw7RRZGCbcwVTNY=; b=U3jJj9+l4DanWmk7XBUZgZ/jbezjj/FfILfPfHIKUAfdDFI7EcIg/lbcvI1ePhCXGTcD6U whtH+IhQDM+xZfer986BAonvCTByPNsdNR2hQsaELk1RIrM87qBqZ2UvzPbWj1e3gE7nz+ KKoIz1DboMeUvtMiNWhLgXrmAduoMkdl7Nc/LEKQ1eAfdDfMpWGvvjSB7nSQbVStGXbod4 6BxDMEIEEYQxlpISnaQgNrEIJocUq2QML97dskVs6Eaf2Q1D6JcIAlWygj1PSzxzRbV6i+ l19Y4pT7uv51XXCq4jgcINHMZypwjPGnRy2obKTR4CMB9ug1CUVibqAKhsCqpQ== From: Lukasz Majewski DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1756073289; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WZBezixw7X2X3S/CeQTQEH5TnKdhiw7RRZGCbcwVTNY=; b=gFH5W9VcclSjfeITNnKZAx4np7FuT4rx882oMSmveCFHn9i9EqnGvsmuv8Jgk0HQt2QQgB o7iYVVgGBoDmmaIDmsaHlzO5p5ptJ0zZ3qt9wbfYUiPumC6av5NzFe3FTFOdvvDJGwj0GI VCj9OhFn6R+4ZJVBVma+ylc0iyr6U6b+/b6aywzrJyKRXsmdFiSjx54RUjjfdY+mr3hwzY BK9ZzYP7LNSEzdsFPdqrjA8G7vnyiNglE4XjnmHcfAzY4dgRxWehkjSRne5gC+YT34rx1T MLOhiuarTZICa1gna7DNYX69q47xwsyM1ocOIluLLZUTlzsHnPkJVw4sZX+tsg== To: Andrew Lunn , davem@davemloft.net, Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo Cc: Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Richard Cochran , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Stefan Wahren , Simon Horman , Lukasz Majewski Subject: [net-next v19 1/7] dt-bindings: net: Add MTIP L2 switch description Date: Mon, 25 Aug 2025 00:07:30 +0200 Message-Id: <20250824220736.1760482-2-lukasz.majewski@mailbox.org> In-Reply-To: <20250824220736.1760482-1-lukasz.majewski@mailbox.org> References: <20250824220736.1760482-1-lukasz.majewski@mailbox.org> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-MBO-RS-ID: 5018cb105d8cf6fe2d1 X-MBO-RS-META: r3jgcqkq9wmk5onmxkwcyn718fyp68hb This patch provides description of the MTIP L2 switch available in some NXP's SOCs - e.g. imx287. Signed-off-by: Lukasz Majewski Reviewed-by: Stefan Wahren Reviewed-by: Rob Herring (Arm) --- Changes for v2: - Rename the file to match exactly the compatible (nxp,imx287-mtip-switch) Changes for v3: - Remove '-' from const:'nxp,imx287-mtip-switch' - Use '^port@[12]+$' for port patternProperties - Drop status = "okay"; - Provide proper indentation for 'example' binding (replace 8 spaces with 4 spaces) - Remove smsc,disable-energy-detect; property - Remove interrupt-parent and interrupts properties as not required - Remove #address-cells and #size-cells from required properties check - remove description from reg: - Add $ref: ethernet-switch.yaml# Changes for v4: - Use $ref: ethernet-switch.yaml#/$defs/ethernet-ports and remove already referenced properties - Rename file to nxp,imx28-mtip-switch.yaml Changes for v5: - Provide proper description for 'ethernet-port' node Changes for v6: - Proper usage of $ref: ethernet-switch.yaml#/$defs/ethernet-ports/patternProperties when specifying the 'ethernet-ports' property - Add description and check for interrupt-names property Changes for v7: - Change switch interrupt name from 'mtipl2sw' to 'enet_switch' Changes for v8: - None Changes for v9: - Add GPIO_ACTIVE_LOW to reset-gpios mdio phandle Changes for v10: - None Changes for v11: - None Changes for v12: - Remove 'label' from required properties - Move the reference to $ref: ethernet-switch.yaml#/$defs/ethernet-ports the proper place (under 'allOf:') Changes for v13 - v19: - None --- .../bindings/net/nxp,imx28-mtip-switch.yaml | 150 ++++++++++++++++++ 1 file changed, 150 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/nxp,imx28-mtip-switch.yaml diff --git a/Documentation/devicetree/bindings/net/nxp,imx28-mtip-switch.yaml b/Documentation/devicetree/bindings/net/nxp,imx28-mtip-switch.yaml new file mode 100644 index 000000000000..6a07dcd119ea --- /dev/null +++ b/Documentation/devicetree/bindings/net/nxp,imx28-mtip-switch.yaml @@ -0,0 +1,150 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/nxp,imx28-mtip-switch.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP SoC Ethernet Switch Controller (L2 MoreThanIP switch) + +maintainers: + - Lukasz Majewski + +description: + The 2-port switch ethernet subsystem provides ethernet packet (L2) + communication and can be configured as an ethernet switch. It provides the + reduced media independent interface (RMII), the management data input + output (MDIO) for physical layer device (PHY) management. + +allOf: + - $ref: ethernet-switch.yaml#/$defs/ethernet-ports + +properties: + compatible: + const: nxp,imx28-mtip-switch + + reg: + maxItems: 1 + + phy-supply: + description: + Regulator that powers Ethernet PHYs. + + clocks: + items: + - description: Register accessing clock + - description: Bus access clock + - description: Output clock for external device - e.g. PHY source clock + - description: IEEE1588 timer clock + + clock-names: + items: + - const: ipg + - const: ahb + - const: enet_out + - const: ptp + + interrupts: + items: + - description: Switch interrupt + - description: ENET0 interrupt + - description: ENET1 interrupt + + interrupt-names: + items: + - const: enet_switch + - const: enet0 + - const: enet1 + + pinctrl-names: true + + ethernet-ports: + type: object + additionalProperties: true + + patternProperties: + '^ethernet-port@[12]$': + type: object + additionalProperties: true + properties: + reg: + items: + - enum: [1, 2] + description: MTIP L2 switch port number + + required: + - reg + - phy-mode + - phy-handle + + mdio: + type: object + $ref: mdio.yaml# + unevaluatedProperties: false + description: + Specifies the mdio bus in the switch, used as a container for phy nodes. + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - interrupt-names + - mdio + - ethernet-ports + +unevaluatedProperties: false + +examples: + - | + #include + #include + switch@800f0000 { + compatible = "nxp,imx28-mtip-switch"; + reg = <0x800f0000 0x20000>; + pinctrl-names = "default"; + pinctrl-0 = <&mac0_pins_a>, <&mac1_pins_a>; + phy-supply = <®_fec_3v3>; + interrupts = <100>, <101>, <102>; + interrupt-names = "enet_switch", "enet0", "enet1"; + clocks = <&clks 57>, <&clks 57>, <&clks 64>, <&clks 35>; + clock-names = "ipg", "ahb", "enet_out", "ptp"; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + mtip_port1: ethernet-port@1 { + reg = <1>; + label = "lan0"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-mode = "rmii"; + phy-handle = <ðphy0>; + }; + + mtip_port2: ethernet-port@2 { + reg = <2>; + label = "lan1"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-mode = "rmii"; + phy-handle = <ðphy1>; + }; + }; + + mdio_sw: mdio { + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio2 13 GPIO_ACTIVE_LOW>; + reset-delay-us = <25000>; + reset-post-delay-us = <10000>; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; + + ethphy1: ethernet-phy@1 { + reg = <1>; + }; + }; + }; -- 2.39.5