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From: Maxime Chevallier <maxime.chevallier@bootlin.com>
To: davem@davemloft.net
Cc: "Maxime Chevallier" <maxime.chevallier@bootlin.com>,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, thomas.petazzoni@bootlin.com,
	"Andrew Lunn" <andrew@lunn.ch>,
	"Jakub Kicinski" <kuba@kernel.org>,
	"Eric Dumazet" <edumazet@google.com>,
	"Paolo Abeni" <pabeni@redhat.com>,
	"Russell King" <linux@armlinux.org.uk>,
	linux-arm-kernel@lists.infradead.org,
	"Christophe Leroy" <christophe.leroy@csgroup.eu>,
	"Herve Codina" <herve.codina@bootlin.com>,
	"Florian Fainelli" <f.fainelli@gmail.com>,
	"Heiner Kallweit" <hkallweit1@gmail.com>,
	"Vladimir Oltean" <vladimir.oltean@nxp.com>,
	"Köry Maincent" <kory.maincent@bootlin.com>,
	"Marek Behún" <kabel@kernel.org>,
	"Oleksij Rempel" <o.rempel@pengutronix.de>,
	"Nicolò Veronese" <nicveronese@gmail.com>,
	"Simon Horman" <horms@kernel.org>,
	mwojtas@chromium.org, "Antoine Tenart" <atenart@kernel.org>,
	devicetree@vger.kernel.org, "Conor Dooley" <conor+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Romain Gantois" <romain.gantois@bootlin.com>,
	"Daniel Golle" <daniel@makrotopia.org>,
	"Dimitri Fedrau" <dimitri.fedrau@liebherr.com>
Subject: [PATCH net-next v12 08/18] net: phylink: Move phylink_interface_max_speed to phy_caps
Date: Tue,  9 Sep 2025 17:26:04 +0200	[thread overview]
Message-ID: <20250909152617.119554-9-maxime.chevallier@bootlin.com> (raw)
In-Reply-To: <20250909152617.119554-1-maxime.chevallier@bootlin.com>

The phylink_interface_max_speed() retrieves the max achievable speed
on a MII interface. This logic needs to be re-used in other parts of the
PHY stack, let's move it to phy_caps as it already contains most of the
interface attribute accessors.

Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
---
 drivers/net/phy/phy-caps.h |  1 +
 drivers/net/phy/phy_caps.c | 80 +++++++++++++++++++++++++++++++++++
 drivers/net/phy/phylink.c  | 87 ++------------------------------------
 3 files changed, 85 insertions(+), 83 deletions(-)

diff --git a/drivers/net/phy/phy-caps.h b/drivers/net/phy/phy-caps.h
index 01df1bdc1516..ba81cd75e122 100644
--- a/drivers/net/phy/phy-caps.h
+++ b/drivers/net/phy/phy-caps.h
@@ -49,6 +49,7 @@ void phy_caps_linkmode_max_speed(u32 max_speed, unsigned long *linkmodes);
 bool phy_caps_valid(int speed, int duplex, const unsigned long *linkmodes);
 void phy_caps_linkmodes(unsigned long caps, unsigned long *linkmodes);
 unsigned long phy_caps_from_interface(phy_interface_t interface);
+int phy_caps_interface_max_speed(phy_interface_t interface);
 
 const struct link_capabilities *
 phy_caps_lookup_by_linkmode(const unsigned long *linkmodes);
diff --git a/drivers/net/phy/phy_caps.c b/drivers/net/phy/phy_caps.c
index e4efd5c477b4..b38c567ec6ef 100644
--- a/drivers/net/phy/phy_caps.c
+++ b/drivers/net/phy/phy_caps.c
@@ -440,3 +440,83 @@ u32 phy_caps_mediums_from_linkmodes(unsigned long *linkmodes)
 	return mediums;
 }
 EXPORT_SYMBOL_GPL(phy_caps_mediums_from_linkmodes);
+
+/**
+ * phy_caps_interface_max_speed() - get the maximum speed of a phy interface
+ * @interface: phy interface mode defined by &typedef phy_interface_t
+ *
+ * Determine the maximum speed of a phy interface. This is intended to help
+ * determine the correct speed to pass to the MAC when the phy is performing
+ * rate matching.
+ *
+ * Return: The maximum speed of @interface
+ */
+int phy_caps_interface_max_speed(phy_interface_t interface)
+{
+	switch (interface) {
+	case PHY_INTERFACE_MODE_100BASEX:
+	case PHY_INTERFACE_MODE_REVRMII:
+	case PHY_INTERFACE_MODE_RMII:
+	case PHY_INTERFACE_MODE_SMII:
+	case PHY_INTERFACE_MODE_REVMII:
+	case PHY_INTERFACE_MODE_MII:
+	case PHY_INTERFACE_MODE_MIILITE:
+		return SPEED_100;
+
+	case PHY_INTERFACE_MODE_TBI:
+	case PHY_INTERFACE_MODE_MOCA:
+	case PHY_INTERFACE_MODE_RTBI:
+	case PHY_INTERFACE_MODE_1000BASEX:
+	case PHY_INTERFACE_MODE_1000BASEKX:
+	case PHY_INTERFACE_MODE_TRGMII:
+	case PHY_INTERFACE_MODE_RGMII_TXID:
+	case PHY_INTERFACE_MODE_RGMII_RXID:
+	case PHY_INTERFACE_MODE_RGMII_ID:
+	case PHY_INTERFACE_MODE_RGMII:
+	case PHY_INTERFACE_MODE_PSGMII:
+	case PHY_INTERFACE_MODE_QSGMII:
+	case PHY_INTERFACE_MODE_QUSGMII:
+	case PHY_INTERFACE_MODE_SGMII:
+	case PHY_INTERFACE_MODE_GMII:
+		return SPEED_1000;
+
+	case PHY_INTERFACE_MODE_2500BASEX:
+	case PHY_INTERFACE_MODE_10G_QXGMII:
+		return SPEED_2500;
+
+	case PHY_INTERFACE_MODE_5GBASER:
+		return SPEED_5000;
+
+	case PHY_INTERFACE_MODE_XGMII:
+	case PHY_INTERFACE_MODE_RXAUI:
+	case PHY_INTERFACE_MODE_XAUI:
+	case PHY_INTERFACE_MODE_10GBASER:
+	case PHY_INTERFACE_MODE_10GKR:
+	case PHY_INTERFACE_MODE_USXGMII:
+		return SPEED_10000;
+
+	case PHY_INTERFACE_MODE_25GBASER:
+		return SPEED_25000;
+
+	case PHY_INTERFACE_MODE_XLGMII:
+		return SPEED_40000;
+
+	case PHY_INTERFACE_MODE_50GBASER:
+	case PHY_INTERFACE_MODE_LAUI:
+		return SPEED_50000;
+
+	case PHY_INTERFACE_MODE_100GBASEP:
+		return SPEED_100000;
+
+	case PHY_INTERFACE_MODE_INTERNAL:
+	case PHY_INTERFACE_MODE_NA:
+	case PHY_INTERFACE_MODE_MAX:
+		/* No idea! Garbage in, unknown out */
+		return SPEED_UNKNOWN;
+	}
+
+	/* If we get here, someone forgot to add an interface mode above */
+	WARN_ON_ONCE(1);
+	return SPEED_UNKNOWN;
+}
+EXPORT_SYMBOL_GPL(phy_caps_interface_max_speed);
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index c7cb95aa8007..091b1ee5c49a 100644
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -218,85 +218,6 @@ static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
 	}
 }
 
-/**
- * phylink_interface_max_speed() - get the maximum speed of a phy interface
- * @interface: phy interface mode defined by &typedef phy_interface_t
- *
- * Determine the maximum speed of a phy interface. This is intended to help
- * determine the correct speed to pass to the MAC when the phy is performing
- * rate matching.
- *
- * Return: The maximum speed of @interface
- */
-static int phylink_interface_max_speed(phy_interface_t interface)
-{
-	switch (interface) {
-	case PHY_INTERFACE_MODE_100BASEX:
-	case PHY_INTERFACE_MODE_REVRMII:
-	case PHY_INTERFACE_MODE_RMII:
-	case PHY_INTERFACE_MODE_SMII:
-	case PHY_INTERFACE_MODE_REVMII:
-	case PHY_INTERFACE_MODE_MII:
-	case PHY_INTERFACE_MODE_MIILITE:
-		return SPEED_100;
-
-	case PHY_INTERFACE_MODE_TBI:
-	case PHY_INTERFACE_MODE_MOCA:
-	case PHY_INTERFACE_MODE_RTBI:
-	case PHY_INTERFACE_MODE_1000BASEX:
-	case PHY_INTERFACE_MODE_1000BASEKX:
-	case PHY_INTERFACE_MODE_TRGMII:
-	case PHY_INTERFACE_MODE_RGMII_TXID:
-	case PHY_INTERFACE_MODE_RGMII_RXID:
-	case PHY_INTERFACE_MODE_RGMII_ID:
-	case PHY_INTERFACE_MODE_RGMII:
-	case PHY_INTERFACE_MODE_PSGMII:
-	case PHY_INTERFACE_MODE_QSGMII:
-	case PHY_INTERFACE_MODE_QUSGMII:
-	case PHY_INTERFACE_MODE_SGMII:
-	case PHY_INTERFACE_MODE_GMII:
-		return SPEED_1000;
-
-	case PHY_INTERFACE_MODE_2500BASEX:
-	case PHY_INTERFACE_MODE_10G_QXGMII:
-		return SPEED_2500;
-
-	case PHY_INTERFACE_MODE_5GBASER:
-		return SPEED_5000;
-
-	case PHY_INTERFACE_MODE_XGMII:
-	case PHY_INTERFACE_MODE_RXAUI:
-	case PHY_INTERFACE_MODE_XAUI:
-	case PHY_INTERFACE_MODE_10GBASER:
-	case PHY_INTERFACE_MODE_10GKR:
-	case PHY_INTERFACE_MODE_USXGMII:
-		return SPEED_10000;
-
-	case PHY_INTERFACE_MODE_25GBASER:
-		return SPEED_25000;
-
-	case PHY_INTERFACE_MODE_XLGMII:
-		return SPEED_40000;
-
-	case PHY_INTERFACE_MODE_50GBASER:
-	case PHY_INTERFACE_MODE_LAUI:
-		return SPEED_50000;
-
-	case PHY_INTERFACE_MODE_100GBASEP:
-		return SPEED_100000;
-
-	case PHY_INTERFACE_MODE_INTERNAL:
-	case PHY_INTERFACE_MODE_NA:
-	case PHY_INTERFACE_MODE_MAX:
-		/* No idea! Garbage in, unknown out */
-		return SPEED_UNKNOWN;
-	}
-
-	/* If we get here, someone forgot to add an interface mode above */
-	WARN_ON_ONCE(1);
-	return SPEED_UNKNOWN;
-}
-
 static struct {
 	unsigned long mask;
 	int speed;
@@ -430,7 +351,7 @@ static unsigned long phylink_get_capabilities(phy_interface_t interface,
 					      int rate_matching)
 {
 	unsigned long link_caps = phy_caps_from_interface(interface);
-	int max_speed = phylink_interface_max_speed(interface);
+	int max_speed = phy_caps_interface_max_speed(interface);
 	unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
 	unsigned long matched_caps = 0;
 
@@ -1529,7 +1450,7 @@ static void phylink_link_up(struct phylink *pl,
 		 * the link_state) to the interface speed, and will send
 		 * pause frames to the MAC to limit its transmission speed.
 		 */
-		speed = phylink_interface_max_speed(link_state.interface);
+		speed = phy_caps_interface_max_speed(link_state.interface);
 		duplex = DUPLEX_FULL;
 		rx_pause = true;
 		break;
@@ -1539,7 +1460,7 @@ static void phylink_link_up(struct phylink *pl,
 		 * the link_state) to the interface speed, and will cause
 		 * collisions to the MAC to limit its transmission speed.
 		 */
-		speed = phylink_interface_max_speed(link_state.interface);
+		speed = phy_caps_interface_max_speed(link_state.interface);
 		duplex = DUPLEX_HALF;
 		break;
 	}
@@ -2732,7 +2653,7 @@ static phy_interface_t phylink_sfp_select_interface_speed(struct phylink *pl,
 		if (!test_bit(interface, pl->sfp_interfaces))
 			continue;
 
-		max_speed = phylink_interface_max_speed(interface);
+		max_speed = phy_caps_interface_max_speed(interface);
 
 		/* The logic here is: if speed == max_speed, then we've found
 		 * the best interface. Otherwise we find the interface that
-- 
2.49.0


  parent reply	other threads:[~2025-09-09 15:27 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-09 15:25 [PATCH net-next v12 00/18] net: phy: Introduce PHY ports representation Maxime Chevallier
2025-09-09 15:25 ` [PATCH net-next v12 01/18] dt-bindings: net: Introduce the ethernet-connector description Maxime Chevallier
2025-09-09 15:25 ` [PATCH net-next v12 02/18] net: ethtool: common: Indicate that BaseT works on up to 4 lanes Maxime Chevallier
2025-09-09 15:25 ` [PATCH net-next v12 03/18] net: ethtool: Introduce ETHTOOL_LINK_MEDIUM_* values Maxime Chevallier
2025-09-09 15:26 ` [PATCH net-next v12 04/18] net: phy: Introduce PHY ports representation Maxime Chevallier
2025-09-17  6:59   ` Christophe Leroy
2025-09-09 15:26 ` [PATCH net-next v12 05/18] net: phy: dp83822: Add support for phy_port representation Maxime Chevallier
2025-09-17  6:59   ` Christophe Leroy
2025-09-09 15:26 ` [PATCH net-next v12 06/18] dt-bindings: net: dp83822: Deprecate ti,fiber-mode Maxime Chevallier
2025-09-17  7:00   ` Christophe Leroy
2025-09-09 15:26 ` [PATCH net-next v12 07/18] net: phy: Create a phy_port for PHY-driven SFPs Maxime Chevallier
2025-09-09 15:26 ` Maxime Chevallier [this message]
2025-09-17  7:00   ` [PATCH net-next v12 08/18] net: phylink: Move phylink_interface_max_speed to phy_caps Christophe Leroy
2025-09-09 15:26 ` [PATCH net-next v12 09/18] net: phylink: Move sfp interface selection and filtering " Maxime Chevallier
2025-09-11  0:59   ` kernel test robot
2025-09-17  7:01   ` Christophe Leroy
2025-09-09 15:26 ` [PATCH net-next v12 10/18] net: phy: Introduce generic SFP handling for PHY drivers Maxime Chevallier
2025-09-09 15:26 ` [PATCH net-next v12 11/18] net: phy: marvell-88x2222: Support SFP through phy_port interface Maxime Chevallier
2025-09-17  7:01   ` Christophe Leroy
2025-09-09 15:26 ` [PATCH net-next v12 12/18] net: phy: marvell: " Maxime Chevallier
2025-09-17  7:02   ` Christophe Leroy
2025-09-09 15:26 ` [PATCH net-next v12 13/18] net: phy: marvell10g: Support SFP through phy_port Maxime Chevallier
2025-09-17  7:02   ` Christophe Leroy
2025-09-09 15:26 ` [PATCH net-next v12 14/18] net: phy: at803x: Support SFP through phy_port interface Maxime Chevallier
2025-09-17  7:02   ` Christophe Leroy
2025-09-09 15:26 ` [PATCH net-next v12 15/18] net: phy: qca807x: " Maxime Chevallier
2025-09-17  7:03   ` Christophe Leroy
2025-09-09 15:26 ` [PATCH net-next v12 16/18] net: phy: Only rely on phy_port for PHY-driven SFP Maxime Chevallier
2025-09-09 15:26 ` [PATCH net-next v12 17/18] net: phy: dp83822: Add SFP support through the phy_port interface Maxime Chevallier
2025-09-09 15:26 ` [PATCH net-next v12 18/18] Documentation: networking: Document the phy_port infrastructure Maxime Chevallier
2025-09-10 10:22 ` [PATCH net-next v12 00/18] net: phy: Introduce PHY ports representation Oleksij Rempel
2025-09-10 22:19 ` Florian Fainelli
2025-09-17  7:04 ` Christophe Leroy

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