From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-189.mta0.migadu.com (out-189.mta0.migadu.com [91.218.175.189]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A5E4313277 for ; Wed, 10 Sep 2025 22:19:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.189 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757542750; cv=none; b=ihJKQHhkVX2l45P8znF30vnRa+wHz46c0AxtX1slrng0LPHgbV6w2Eas7EP7XjzjMkOEJaI6VuAnWRlkENqki5aJaUcfrqcveklo15nbEHG/if34VP6wCCWkTTPRqa/GoFp5j+v2tM33pG2P+Xxn7W1P8RmkkK4fHvP3G4DdBcA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757542750; c=relaxed/simple; bh=eV0K2GIn5pNZ4ozBfUg0OotLEO7xwOjObGc0k457mY0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PZWKLol7XU7K5iWLc+2SHKZX1OVKOyC31iQq3/OhyFH8JImobww3NnjsDZXKqgCiVU8ax7JUlT2fV+CXB3DR2s6VSfmxGKP3PXTx+5TuvT3r5AH/nB8lTQtbYESg1fWVKBZQLRdt6ycdJ0l8zRIrq8Oafar0w2pgsvkgla4ROlM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=FmkdZyfS; arc=none smtp.client-ip=91.218.175.189 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="FmkdZyfS" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1757542746; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=faDaaCe9eHY4bsA8Y6JtH7wTEzGEgv1zxdTd+/w3W1E=; b=FmkdZyfS/eH70Kx0zumWID/lfsaZxrfR3I/VBKDGU8geKhPo2GeNa9yB3QDaO63Ht8bSWl DUBSLlm0vgPUXUuybuZO77zSU/NPsDjRuDgcZMqnlpxAk/xqRcHHXb1DRMZw1PfgfaGLKD um5sEm1/dp+TKpOuQ9nItl+CYI5ZJBw= From: Vadim Fedorenko To: Jakub Kicinski , Andrew Lunn , Michael Chan , Pavan Chebbi , Tariq Toukan , Gal Pressman , intel-wired-lan@lists.osuosl.org, Donald Hunter , Carolina Jubran , Vadim Fedorenko Cc: Paolo Abeni , Simon Horman , netdev@vger.kernel.org, Yael Chemla , Dragos Tatulea Subject: [PATCH net-next v2 4/4] net/mlx5e: Report RS-FEC histogram statistics via ethtool Date: Wed, 10 Sep 2025 22:11:11 +0000 Message-ID: <20250910221111.1527502-5-vadim.fedorenko@linux.dev> In-Reply-To: <20250910221111.1527502-1-vadim.fedorenko@linux.dev> References: <20250910221111.1527502-1-vadim.fedorenko@linux.dev> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Migadu-Flow: FLOW_OUT From: Carolina Jubran Add support for reporting RS-FEC histogram counters by reading them from the RS_FEC_HISTOGRAM_GROUP in the PPCNT register. Co-developed-by: Yael Chemla Signed-off-by: Yael Chemla Signed-off-by: Carolina Jubran Reviewed-by: Dragos Tatulea Reviewed-by: Yael Chemla Signed-off-by: Vadim Fedorenko --- .../ethernet/mellanox/mlx5/core/en_stats.c | 33 ++++++++++++++++++- 1 file changed, 32 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c index 476689cb0c1f..1da439dda323 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c @@ -1529,15 +1529,46 @@ fec_rs_histogram_fill_ranges(struct mlx5e_priv *priv, return num_of_bins; } +static void fec_rs_histogram_fill_stats(struct mlx5e_priv *priv, + u8 num_of_bins, + struct ethtool_fec_hist *hist) +{ + struct mlx5_core_dev *mdev = priv->mdev; + u32 out[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; + u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0}; + int sz = MLX5_ST_SZ_BYTES(ppcnt_reg); + void *rs_histogram_cntrs; + + MLX5_SET(ppcnt_reg, in, local_port, 1); + MLX5_SET(ppcnt_reg, in, grp, MLX5_RS_FEC_HISTOGRAM_GROUP); + if (mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0)) + return; + + rs_histogram_cntrs = MLX5_ADDR_OF(ppcnt_reg, out, + counter_set.rs_histogram_cntrs); + /* Guaranteed that num_of_bins is less than MLX5E_FEC_RS_HIST_MAX + * by fec_rs_histogram_fill_ranges(). + */ + for (int i = 0; i < num_of_bins; i++) { + hist->values[i].bin_value = MLX5_GET64(rs_histogram_cntrs, + rs_histogram_cntrs, + hist[i]); + } +} + static void fec_set_histograms_stats(struct mlx5e_priv *priv, int mode, struct ethtool_fec_hist *hist) { + u8 num_of_bins; + switch (mode) { case MLX5E_FEC_RS_528_514: case MLX5E_FEC_RS_544_514: case MLX5E_FEC_LLRS_272_257_1: case MLX5E_FEC_RS_544_514_INTERLEAVED_QUAD: - fec_rs_histogram_fill_ranges(priv, &hist->ranges); + num_of_bins = fec_rs_histogram_fill_ranges(priv, &hist->ranges); + if (num_of_bins) + fec_rs_histogram_fill_stats(priv, num_of_bins, hist); break; default: return; -- 2.47.3