From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: Alejandro Lucero Palau <alucerop@amd.com>
Cc: <alejandro.lucero-palau@amd.com>, <linux-cxl@vger.kernel.org>,
<netdev@vger.kernel.org>, <dan.j.williams@intel.com>,
<edward.cree@amd.com>, <davem@davemloft.net>, <kuba@kernel.org>,
<pabeni@redhat.com>, <edumazet@google.com>,
<dave.jiang@intel.com>
Subject: Re: [PATCH v18 20/20] sfc: support pio mapping based on cxl
Date: Tue, 30 Sep 2025 15:51:05 +0100 [thread overview]
Message-ID: <20250930155105.00001463@huawei.com> (raw)
In-Reply-To: <26134b86-1481-451f-9337-70769ec9e792@amd.com>
On Fri, 26 Sep 2025 10:47:27 +0100
Alejandro Lucero Palau <alucerop@amd.com> wrote:
> On 9/18/25 16:08, Jonathan Cameron wrote:
> > A few trivial things inline.
> >
> >> diff --git a/drivers/net/ethernet/sfc/ef10.c b/drivers/net/ethernet/sfc/ef10.c
> >> index 47349c148c0c..7bc854e2d22a 100644
> >> --- a/drivers/net/ethernet/sfc/ef10.c
> >> +++ b/drivers/net/ethernet/sfc/ef10.c
> >> diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c
> >> index 85490afc7930..3dde59003cd9 100644
> >> --- a/drivers/net/ethernet/sfc/efx_cxl.c
> >> +++ b/drivers/net/ethernet/sfc/efx_cxl.c
> >> @@ -11,16 +11,23 @@
> >>
> >> #include "net_driver.h"
> >> #include "efx_cxl.h"
> >> +#include "efx.h"
> >>
> >> #define EFX_CTPIO_BUFFER_SIZE SZ_256M
> >>
> >> static void efx_release_cxl_region(void *priv_cxl)
> >> {
> >> struct efx_probe_data *probe_data = priv_cxl;
> >> + struct efx_nic *efx = &probe_data->efx;
> >> struct efx_cxl *cxl = probe_data->cxl;
> >>
> >> + /* Next avoid contention with efx_cxl_exit() */
> >> probe_data->cxl_pio_initialised = false;
> >> +
> >> + /* Next makes cxl-based piobus to no be used */
> >> + efx_ef10_disable_piobufs(efx);
> >> iounmap(cxl->ctpio_cxl);
> >> +
> > Avoid extra white space changes. Perhaps push to earlier patch.
>
>
> I'll fix the spaces. Not sure what you mean with the second part of your
> comment, but if I understand it right, I think those changes should be
> added in this patch, just when the final functionality is added.
Just the white space. If you want that move it to where that iounmap() is
added. This is just a patch cleanliness thing.
>
>
> FWIW, I have decided to drop this driver callback as Dan did not like
> it, and after realizing those Dan's patches this patchset relies on fix
> most of the problem this callback tried to address.
>
>
> >> cxl_put_root_decoder(cxl->cxlrd);
> >> }
> >>
> >> @@ -30,6 +37,7 @@ int efx_cxl_init(struct efx_probe_data *probe_data)
> >> struct pci_dev *pci_dev = efx->pci_dev;
> >> resource_size_t max_size;
> >> struct efx_cxl *cxl;
> >> + struct range range;
> >> u16 dvsec;
> >> int rc;
> >>
> >> @@ -133,17 +141,34 @@ int efx_cxl_init(struct efx_probe_data *probe_data)
> >> &probe_data);
> >> if (IS_ERR(cxl->efx_region)) {
> >> pci_err(pci_dev, "CXL accel create region failed");
> >> - cxl_dpa_free(cxl->cxled);
> >> rc = PTR_ERR(cxl->efx_region);
> >> - goto err_decoder;
> >> + goto err_dpa;
> > Why do we now need to call cxl_dpa_free() and didn't previously here? That
> > seems like a probably bug in earlier patch.
>
>
> I think you misread it. We were calling cxl_dpa_free already, just
> moving it to a goto label here.
>
Indeed. Needed more coffee that day (or less, can't remember which ;)
next prev parent reply other threads:[~2025-09-30 14:51 UTC|newest]
Thread overview: 88+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-18 9:17 [PATCH v18 00/20] Type2 device basic support alejandro.lucero-palau
2025-09-18 9:17 ` [PATCH v18 01/20] cxl: Add type2 " alejandro.lucero-palau
2025-09-18 10:55 ` Jonathan Cameron
2025-09-23 11:21 ` Alejandro Lucero Palau
2025-09-29 10:21 ` Alejandro Lucero Palau
2025-09-30 14:43 ` Jonathan Cameron
2025-09-22 21:08 ` Cheatham, Benjamin
2025-09-23 11:43 ` Alejandro Lucero Palau
2025-09-18 9:17 ` [PATCH v18 02/20] sfc: add cxl support alejandro.lucero-palau
2025-09-18 23:25 ` Dave Jiang
2025-09-18 9:17 ` [PATCH v18 03/20] cxl: Move pci generic code alejandro.lucero-palau
2025-09-22 21:10 ` Cheatham, Benjamin
2025-09-25 9:27 ` Alejandro Lucero Palau
2025-09-18 9:17 ` [PATCH v18 04/20] cxl: allow Type2 drivers to map cxl component regs alejandro.lucero-palau
2025-09-18 11:03 ` Jonathan Cameron
2025-09-24 8:25 ` Alejandro Lucero Palau
2025-09-25 8:53 ` Alejandro Lucero Palau
2025-09-18 23:30 ` Dave Jiang
2025-09-22 21:08 ` Cheatham, Benjamin
2025-09-24 8:36 ` Alejandro Lucero Palau
2025-10-01 23:20 ` PJ Waskiewicz
2025-10-02 9:36 ` Alejandro Lucero Palau
2025-10-07 21:23 ` PJ Waskiewicz
2025-09-18 9:17 ` [PATCH v18 05/20] cxl: Support dpa initialization without a mailbox alejandro.lucero-palau
2025-09-18 23:38 ` Dave Jiang
2025-09-22 21:09 ` Cheatham, Benjamin
2025-09-18 9:17 ` [PATCH v18 06/20] cxl: Prepare memdev creation for type2 alejandro.lucero-palau
2025-09-22 21:10 ` Cheatham, Benjamin
2025-09-24 8:44 ` Alejandro Lucero Palau
2025-09-18 9:17 ` [PATCH v18 07/20] sfc: create type2 cxl memdev alejandro.lucero-palau
2025-09-18 11:08 ` Jonathan Cameron
2025-09-19 15:59 ` Dave Jiang
2025-09-19 19:58 ` Dave Jiang
2025-09-24 8:56 ` Alejandro Lucero Palau
2025-09-18 9:17 ` [PATCH v18 08/20] cx/memdev: Indicate probe deferral alejandro.lucero-palau
2025-09-18 11:19 ` Jonathan Cameron
2025-09-19 17:53 ` Dave Jiang
2025-09-24 16:11 ` Alejandro Lucero Palau
2025-09-18 9:17 ` [PATCH v18 09/20] cxl: Define a driver interface for HPA free space enumeration alejandro.lucero-palau
2025-09-18 14:35 ` Jonathan Cameron
2025-09-24 16:16 ` Alejandro Lucero Palau
2025-09-30 14:47 ` Jonathan Cameron
2025-09-22 21:09 ` Cheatham, Benjamin
2025-09-24 16:53 ` Alejandro Lucero Palau
2025-09-18 9:17 ` [PATCH v18 10/20] sfc: get root decoder alejandro.lucero-palau
2025-09-19 18:20 ` Dave Jiang
2025-09-22 21:09 ` Cheatham, Benjamin
2025-09-18 9:17 ` [PATCH v18 11/20] cxl: Define a driver interface for DPA allocation alejandro.lucero-palau
2025-09-18 14:52 ` Jonathan Cameron
2025-09-25 9:18 ` Alejandro Lucero Palau
2025-09-19 19:46 ` Dave Jiang
2025-09-25 9:21 ` Alejandro Lucero Palau
2025-09-22 21:09 ` Cheatham, Benjamin
2025-09-25 9:25 ` Alejandro Lucero Palau
2025-09-18 9:17 ` [PATCH v18 12/20] sfc: get endpoint decoder alejandro.lucero-palau
2025-09-18 14:53 ` Jonathan Cameron
2025-09-25 9:45 ` Alejandro Lucero Palau
2025-09-22 21:09 ` Cheatham, Benjamin
2025-09-25 9:48 ` Alejandro Lucero Palau
2025-09-18 9:17 ` [PATCH v18 13/20] cxl: Make region type based on endpoint type alejandro.lucero-palau
2025-09-18 9:17 ` [PATCH v18 14/20] cxl/region: Factor out interleave ways setup alejandro.lucero-palau
2025-09-18 9:17 ` [PATCH v18 15/20] cxl/region: Factor out interleave granularity setup alejandro.lucero-palau
2025-09-18 9:17 ` [PATCH v18 16/20] cxl: Allow region creation by type2 drivers alejandro.lucero-palau
2025-09-18 14:58 ` Jonathan Cameron
2025-09-19 20:59 ` Dave Jiang
2025-09-26 8:59 ` Alejandro Lucero Palau
2025-09-30 0:52 ` Dave Jiang
2025-10-06 7:12 ` Alejandro Lucero Palau
2025-09-22 21:09 ` Cheatham, Benjamin
2025-09-26 9:01 ` Alejandro Lucero Palau
2025-09-18 9:17 ` [PATCH v18 17/20] cxl: Avoid dax creation for accelerators alejandro.lucero-palau
2025-09-19 21:16 ` Dave Jiang
2025-09-22 21:09 ` Cheatham, Benjamin
2025-09-18 9:17 ` [PATCH v18 18/20] sfc: create cxl region alejandro.lucero-palau
2025-09-18 15:03 ` Jonathan Cameron
2025-09-26 9:27 ` Alejandro Lucero Palau
2025-09-18 9:17 ` [PATCH v18 19/20] cxl: Add function for obtaining region range alejandro.lucero-palau
2025-09-18 9:17 ` [PATCH v18 20/20] sfc: support pio mapping based on cxl alejandro.lucero-palau
2025-09-18 15:08 ` Jonathan Cameron
2025-09-26 9:47 ` Alejandro Lucero Palau
2025-09-30 14:51 ` Jonathan Cameron [this message]
2025-09-19 12:51 ` [PATCH v18 00/20] Type2 device basic support Alejandro Lucero Palau
2025-09-19 16:26 ` Dave Jiang
2025-09-19 16:55 ` Alejandro Lucero Palau
2025-09-19 21:42 ` Dave Jiang
2025-09-23 10:35 ` Alejandro Lucero Palau
2025-09-23 18:28 ` Dave Jiang
2025-09-22 21:10 ` Cheatham, Benjamin
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