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[2.205.18.238]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6411f85f8c7sm4054682a12.27.2025.11.07.00.30.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Nov 2025 00:30:24 -0800 (PST) From: Jonas Gorski To: Florian Fainelli , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Florian Fainelli , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Subject: [PATCH net v2] net: dsa: b53: bcm531x5: fix cpu rgmii mode interpretation Date: Fri, 7 Nov 2025 09:30:06 +0100 Message-ID: <20251107083006.44604-1-jonas.gorski@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit b53_adjust_531x5_rgmii() incorrectly enable delays in rgmii mode, but disables them in rgmii-id mode. Only rgmii-txid is correctly handled. Fix this by correctly enabling rx delay in rgmii-rxid and rgmii-id modes, and tx delay in rgmii-txid and rgmii-id modes. Since b53_adjust_531x5_rgmii() is only called for fixed-link ports, these are usually used as the CPU port, connected to a MAC. This means the chip is assuming the role of the PHY and enabling delays is expected. Since this has the potential to break existing setups, treat rgmii as rgmii-id to keep the old broken behavior. Fixes: 967dd82ffc52 ("net: dsa: b53: Add support for Broadcom RoboSwitch") Reported-by: Álvaro Fernández Rojas Signed-off-by: Jonas Gorski --- Changes v1 -> v2: * dropped RFC prefix (since it did the opposite, and I got zero comments) * dropped the KConfig option and just always treat RGMII as RGMII-ID * adapted the commit message accordingly drivers/net/dsa/b53/b53_common.c | 30 +++++++++++++++++++++--------- 1 file changed, 21 insertions(+), 9 deletions(-) diff --git a/drivers/net/dsa/b53/b53_common.c b/drivers/net/dsa/b53/b53_common.c index eb767edc4c13..ac476cc6d6db 100644 --- a/drivers/net/dsa/b53/b53_common.c +++ b/drivers/net/dsa/b53/b53_common.c @@ -1447,6 +1447,13 @@ static void b53_adjust_531x5_rgmii(struct dsa_switch *ds, int port, else off = B53_RGMII_CTRL_P(port); + /* Older driver versions incorrectly applied delays in + * PHY_INTERFACE_MODE_RGMII mode. In order to not break old users, keep + * interpreting RGMII as RGMII-ID. + */ + if (interface == PHY_INTERFACE_MODE_RGMII) + interface = PHY_INTERFACE_MODE_RGMII_ID; + /* Configure the port RGMII clock delay by DLL disabled and * tx_clk aligned timing (restoring to reset defaults) */ @@ -1458,19 +1465,24 @@ static void b53_adjust_531x5_rgmii(struct dsa_switch *ds, int port, * account for this internal delay that is inserted, otherwise * the switch won't be able to receive correctly. * + * PHY_INTERFACE_MODE_RGMII_RXID means RX internal delay, make + * sure that we enable the port RX clock internal sampling delay + * to account for this internal delay that is inserted, otherwise + * the switch won't be able to send correctly. + * + * PHY_INTERFACE_MODE_RGMII_ID means both RX and TX internal delay, + * make sure that we enable delays for both. + * * PHY_INTERFACE_MODE_RGMII means that we are not introducing * any delay neither on transmission nor reception, so the - * BCM53125 must also be configured accordingly to account for - * the lack of delay and introduce - * - * The BCM53125 switch has its RX clock and TX clock control - * swapped, hence the reason why we modify the TX clock path in - * the "RGMII" case + * BCM53125 must also be configured accordingly. */ - if (interface == PHY_INTERFACE_MODE_RGMII_TXID) + if (interface == PHY_INTERFACE_MODE_RGMII_TXID || + interface == PHY_INTERFACE_MODE_RGMII_ID) rgmii_ctrl |= RGMII_CTRL_DLL_TXC; - if (interface == PHY_INTERFACE_MODE_RGMII) - rgmii_ctrl |= RGMII_CTRL_DLL_TXC | RGMII_CTRL_DLL_RXC; + if (interface == PHY_INTERFACE_MODE_RGMII_RXID || + interface == PHY_INTERFACE_MODE_RGMII_ID) + rgmii_ctrl |= RGMII_CTRL_DLL_RXC; if (dev->chip_id != BCM53115_DEVICE_ID) rgmii_ctrl |= RGMII_CTRL_TIMING_SEL; base-commit: c2c2ccfd4ba72718266a56f3ecc34c989cb5b7a0 -- 2.43.0