From: kernel test robot <lkp@intel.com>
To: Daniel Golle <daniel@makrotopia.org>,
Hauke Mehrtens <hauke@hauke-m.de>, Andrew Lunn <andrew@lunn.ch>,
Vladimir Oltean <olteanv@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Russell King <linux@armlinux.org.uk>,
linux-kernel@vger.kernel.org
Cc: oe-kbuild-all@lists.linux.dev, netdev@vger.kernel.org,
Rasmus Villemoes <ravi@prevas.dk>,
"Benny (Ying-Tsan) Weng" <yweng@maxlinear.com>,
John Crispin <john@phrozen.org>
Subject: Re: [PATCH net v2] net: dsa: mxl-gsw1xx: manually clear RANEG bit
Date: Mon, 8 Dec 2025 04:09:39 +0800 [thread overview]
Message-ID: <202512080341.Vpa2e40b-lkp@intel.com> (raw)
In-Reply-To: <a90b206e9fd8e4248fd639afd5ae296454ac99b9.1765060046.git.daniel@makrotopia.org>
Hi Daniel,
kernel test robot noticed the following build errors:
[auto build test ERROR on net/main]
url: https://github.com/intel-lab-lkp/linux/commits/Daniel-Golle/net-dsa-mxl-gsw1xx-manually-clear-RANEG-bit/20251207-063852
base: net/main
patch link: https://lore.kernel.org/r/a90b206e9fd8e4248fd639afd5ae296454ac99b9.1765060046.git.daniel%40makrotopia.org
patch subject: [PATCH net v2] net: dsa: mxl-gsw1xx: manually clear RANEG bit
config: um-allyesconfig (https://download.01.org/0day-ci/archive/20251208/202512080341.Vpa2e40b-lkp@intel.com/config)
compiler: gcc-14 (Debian 14.2.0-19) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251208/202512080341.Vpa2e40b-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202512080341.Vpa2e40b-lkp@intel.com/
All errors (new ones prefixed by >>):
drivers/net/dsa/lantiq/mxl-gsw1xx.c: In function 'gsw1xx_pcs_an_restart':
>> drivers/net/dsa/lantiq/mxl-gsw1xx.c:449:35: error: 'gsw1xx_priv' undeclared (first use in this function)
449 | cancel_delayed_work_sync(&gsw1xx_priv->clear_raneg);
| ^~~~~~~~~~~
drivers/net/dsa/lantiq/mxl-gsw1xx.c:449:35: note: each undeclared identifier is reported only once for each function it appears in
vim +/gsw1xx_priv +449 drivers/net/dsa/lantiq/mxl-gsw1xx.c
444
445 static void gsw1xx_pcs_an_restart(struct phylink_pcs *pcs)
446 {
447 struct gsw1xx_priv *priv = pcs_to_gsw1xx(pcs);
448
> 449 cancel_delayed_work_sync(&gsw1xx_priv->clear_raneg);
450
451 regmap_set_bits(priv->sgmii, GSW1XX_SGMII_TBI_ANEGCTL,
452 GSW1XX_SGMII_TBI_ANEGCTL_RANEG);
453
454 /* despite being documented as self-clearing, the RANEG bit
455 * sometimes remains set, preventing auto-negotiation from happening.
456 * MaxLinear advises to manually clear the bit after 10ms.
457 */
458 schedule_delayed_work(&priv->clear_raneg, msecs_to_jiffies(10));
459 }
460
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
next prev parent reply other threads:[~2025-12-07 20:10 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-06 22:36 [PATCH net v2] net: dsa: mxl-gsw1xx: manually clear RANEG bit Daniel Golle
2025-12-07 20:09 ` kernel test robot [this message]
2025-12-08 1:31 ` kernel test robot
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