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From: Ivan Vecera <ivecera@redhat.com>
To: netdev@vger.kernel.org, Andrew Lunn <andrew+netdev@lunn.ch>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Vadim Fedorenko <vadim.fedorenko@linux.dev>,
	Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
	Grzegorz Nitka <grzegorz.nitka@intel.com>,
	Jiri Pirko <jiri@resnulli.us>, Petr Oros <poros@redhat.com>,
	Michal Schmidt <mschmidt@redhat.com>,
	Prathosh Satish <Prathosh.Satish@microchip.com>,
	Tony Nguyen <anthony.l.nguyen@intel.com>,
	Przemek Kitszel <przemyslaw.kitszel@intel.com>,
	Saeed Mahameed <saeedm@nvidia.com>,
	Leon Romanovsky <leon@kernel.org>,
	Tariq Toukan <tariqt@nvidia.com>, Mark Bloch <mbloch@nvidia.com>,
	Richard Cochran <richardcochran@gmail.com>,
	Jonathan Lemon <jonathan.lemon@gmail.com>,
	Simon Horman <horms@kernel.org>,
	Alexander Lobakin <aleksander.lobakin@intel.com>,
	Willem de Bruijn <willemb@google.com>,
	Stefan Wahren <wahrenst@gmx.net>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	intel-wired-lan@lists.osuosl.org, linux-rdma@vger.kernel.org
Subject: [PATCH RFC net-next 06/13] dpll: Support dynamic pin index allocation
Date: Thu, 11 Dec 2025 20:47:49 +0100	[thread overview]
Message-ID: <20251211194756.234043-7-ivecera@redhat.com> (raw)
In-Reply-To: <20251211194756.234043-1-ivecera@redhat.com>

Allow drivers to register DPLL pins without manually specifying a pin
index.

Currently, drivers must provide a unique pin index when calling
dpll_pin_get(). This works well for hardware-mapped pins but creates
friction for drivers handling virtual pins or those without a strict
hardware indexing scheme.

Introduce DPLL_PIN_IDX_UNSPEC (U32_MAX). When a driver passes this
value as the pin index:
1. The core allocates a unique index using an IDA
2. The allocated index is mapped to a range starting above `INT_MAX`

This separation ensures that dynamically allocated indices never collide
with standard driver-provided hardware indices, which are assumed to be
within the `0` to `INT_MAX` range. The index is automatically freed when
the pin is released in dpll_pin_put().

Signed-off-by: Ivan Vecera <ivecera@redhat.com>
---
 drivers/dpll/dpll_core.c | 48 ++++++++++++++++++++++++++++++++++++++--
 include/linux/dpll.h     |  2 ++
 2 files changed, 48 insertions(+), 2 deletions(-)

diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c
index fecc3d97acf5b..79f60e0de27ac 100644
--- a/drivers/dpll/dpll_core.c
+++ b/drivers/dpll/dpll_core.c
@@ -10,6 +10,7 @@
 
 #include <linux/device.h>
 #include <linux/err.h>
+#include <linux/idr.h>
 #include <linux/property.h>
 #include <linux/slab.h>
 #include <linux/string.h>
@@ -24,6 +25,7 @@ DEFINE_XARRAY_FLAGS(dpll_device_xa, XA_FLAGS_ALLOC);
 DEFINE_XARRAY_FLAGS(dpll_pin_xa, XA_FLAGS_ALLOC);
 
 static RAW_NOTIFIER_HEAD(dpll_notifier_chain);
+static DEFINE_IDA(dpll_pin_idx_ida);
 
 static u32 dpll_device_xa_id;
 static u32 dpll_pin_xa_id;
@@ -468,6 +470,36 @@ void dpll_device_unregister(struct dpll_device *dpll,
 }
 EXPORT_SYMBOL_GPL(dpll_device_unregister);
 
+static int dpll_pin_idx_alloc(u32 *pin_idx)
+{
+	int ret;
+
+	if (!pin_idx)
+		return -EINVAL;
+
+	/* Alloc unique number from IDA. Number belongs to <0, INT_MAX> range */
+	ret = ida_alloc(&dpll_pin_idx_ida, GFP_KERNEL);
+	if (ret < 0)
+		return ret;
+
+	/* Map the value to dynamic pin index range <INT_MAX+1, U32_MAX> */
+	*pin_idx = (u32)ret + INT_MAX + 1;
+
+	return 0;
+}
+
+static void dpll_pin_idx_free(u32 pin_idx)
+{
+	if (pin_idx <= INT_MAX)
+		return; /* Not a dynamic pin index */
+
+	/* Map the index value from dynamic pin index range to IDA range and
+	 * free it.
+	 */
+	pin_idx -= INT_MAX - 1;
+	ida_free(&dpll_pin_idx_ida, pin_idx);
+}
+
 static void dpll_pin_prop_free(struct dpll_pin_properties *prop)
 {
 	kfree(prop->package_label);
@@ -526,9 +558,18 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module,
 	struct dpll_pin *pin;
 	int ret;
 
+	if (pin_idx == DPLL_PIN_IDX_UNSPEC) {
+		ret = dpll_pin_idx_alloc(&pin_idx);
+		if (ret)
+			return ERR_PTR(ret);
+	} else if (pin_idx > INT_MAX) {
+		return ERR_PTR(-EINVAL);
+	}
 	pin = kzalloc(sizeof(*pin), GFP_KERNEL);
-	if (!pin)
-		return ERR_PTR(-ENOMEM);
+	if (!pin) {
+		ret = -ENOMEM;
+		goto err_pin_alloc;
+	}
 	pin->pin_idx = pin_idx;
 	pin->clock_id = clock_id;
 	pin->module = module;
@@ -557,6 +598,8 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module,
 	dpll_pin_prop_free(&pin->prop);
 err_pin_prop:
 	kfree(pin);
+err_pin_alloc:
+	dpll_pin_idx_free(pin_idx);
 	return ERR_PTR(ret);
 }
 
@@ -663,6 +706,7 @@ void dpll_pin_put(struct dpll_pin *pin)
 		xa_destroy(&pin->ref_sync_pins);
 		dpll_pin_prop_free(&pin->prop);
 		fwnode_handle_put(pin->fwnode);
+		dpll_pin_idx_free(pin->pin_idx);
 		kfree_rcu(pin, rcu);
 	}
 	mutex_unlock(&dpll_lock);
diff --git a/include/linux/dpll.h b/include/linux/dpll.h
index 441afb90d2a29..8aa1df38ce563 100644
--- a/include/linux/dpll.h
+++ b/include/linux/dpll.h
@@ -235,6 +235,8 @@ int dpll_device_register(struct dpll_device *dpll, enum dpll_type type,
 void dpll_device_unregister(struct dpll_device *dpll,
 			    const struct dpll_device_ops *ops, void *priv);
 
+#define DPLL_PIN_IDX_UNSPEC	U32_MAX
+
 struct dpll_pin *
 dpll_pin_get(u64 clock_id, u32 dev_driver_id, struct module *module,
 	     const struct dpll_pin_properties *prop,
-- 
2.51.2


  parent reply	other threads:[~2025-12-11 19:49 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-11 19:47 [PATCH RFC net-next 00/13] dpll: Core improvements and ice E825-C SyncE support Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 01/13] dt-bindings: net: ethernet-controller: Add DPLL pin properties Ivan Vecera
2025-12-11 19:56   ` Andrew Lunn
2025-12-14 20:41     ` Ivan Vecera
2025-12-17  0:49     ` Rob Herring
2025-12-11 19:47 ` [PATCH RFC net-next 02/13] dpll: Allow registering pin with firmware node Ivan Vecera
2025-12-12 11:25   ` Jiri Pirko
2025-12-14 19:35     ` Ivan Vecera
2025-12-15 13:08       ` Jiri Pirko
2025-12-15 13:51         ` Ivan Vecera
2025-12-15 14:09           ` Jiri Pirko
2025-12-11 19:47 ` [PATCH RFC net-next 03/13] net: eth: Add helpers to find DPLL pin " Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 04/13] dpll: zl3073x: register pins with fwnode handle Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 05/13] dpll: Add notifier chain for dpll events Ivan Vecera
2025-12-11 19:47 ` Ivan Vecera [this message]
2025-12-15 14:10   ` [PATCH RFC net-next 06/13] dpll: Support dynamic pin index allocation Przemek Kitszel
2025-12-15 14:43     ` Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 07/13] dpll: zl3073x: Add support for mux pin type Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 08/13] dpll: Enhance and consolidate reference counting logic Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 09/13] dpll: Prevent duplicate registrations Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 10/13] dpll: Add reference count tracking support Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 11/13] dpll: zl3073x: Enable reference count tracking Ivan Vecera
2025-12-12 11:11   ` Jiri Pirko
2025-12-11 19:47 ` [PATCH RFC net-next 12/13] ice: dpll: " Ivan Vecera
2025-12-11 19:47 ` [PATCH RFC net-next 13/13] ice: dpll: Support E825-C SyncE and dynamic pin discovery Ivan Vecera
2025-12-12 10:20   ` [Intel-wired-lan] " Loktionov, Aleksandr
2025-12-14 19:30     ` Ivan Vecera

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