From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mout-p-103.mailbox.org (mout-p-103.mailbox.org [80.241.56.161]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8BD2A31282E; Thu, 18 Dec 2025 17:37:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=80.241.56.161 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766079471; cv=none; b=DCFWEBu8lLMHPZeGsWEow8ceMXX+/NBlWoZHO8yzZxsmVd9Nw/St0BF64rtN7Gi57Y6kZebr0b2/6r/4waGTM7bg5iv7MxB48BIeWxuaKo7lOR8aW2X7pJLWFRgllEef233Ajarh/7/K9/VYHVqQpEQJyJ1lBo5Ovtr4YKxmMbk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766079471; c=relaxed/simple; bh=1Eb6/Qiz+DilGZitP0VpE6/NKIW1hMoZiKzmUWUWzow=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=X2z2/tsvl/H+ATynMqwu9FVEeNKHY0vkfjHW4/JrL5Jb2B0UyFFpqO9Gbc+bGG6keQzkV+/xcbkd8V88jy3H5jMPvJ8zXxHJVsh8aE+JWe8lnXtwLACY4MSzS0U9p12y0F8MfTiN25a8S6jU2Cyx9DkRZyr5jxjlHF9DuUDjQdc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mailbox.org; spf=pass smtp.mailfrom=mailbox.org; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b=OrC7zml7; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b=Wz/zTnmx; arc=none smtp.client-ip=80.241.56.161 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mailbox.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mailbox.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b="OrC7zml7"; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b="Wz/zTnmx" Received: from smtp202.mailbox.org (smtp202.mailbox.org [10.196.197.202]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-103.mailbox.org (Postfix) with ESMTPS id 4dXHtg3hBJz9ss3; Thu, 18 Dec 2025 18:37:47 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1766079467; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=l3rR1xrhGxRltRK4YyFW/wylve91wMwFu1PFVpulu48=; b=OrC7zml7iPoSQlFj2bHPPo2yBFR8vLflGhVeNVsjRzAQVZI4FIvGHS66YTg06VmUV5GGLy S1HFwmCeZnjXHSeSCgefuhcaB6+i2lukM6F2ADVrixqZY/PC+89jDOqtzohEoNuKt14s3O 95i8N/rtBAU+gL8k9of0A9cTDaNJiLaPw4EoSwgQyJJdXrywplFTiZPRYtbIkfJpb0+aj/ yABu20jo+nvDwZFiOy9qOxUcFwMuNqdg5j+k8EZvwb/NdWpIdyxflZsE+Ukb0qiI7GJzvY DFn3sdQG6UBjoI1h2JeTbr54w0wQrfwY3S/k1emZwSq9qFvQeZsgU6+MWUYk2w== From: Marek Vasut DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1766079465; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=l3rR1xrhGxRltRK4YyFW/wylve91wMwFu1PFVpulu48=; b=Wz/zTnmxpewZE6MScAkCSY0crECXl7KRbbkGYZsYgRSQLp25dphhHZa15UltSWNIOPD7x4 Fe95MNQobZqyzJxwwYVmsVJ9ToniLkHe8/ALc97xnJSJqAJqUNOwWoR5nNEDGZzHUnjbVx CWin9KkkGFnfN9Is3mJRYVhXyyvGl9cIrdDJs7Q6Md8X+2+CENrd6wG5fG8z84wq6xHHx+ +/UN8jMGGgdliFBS2YTILRCYa8RN1qw8gwEh9zBrEaeS7gq275wHgOLL9w2Ke1skSYTuDa CHYR7GnU7PjeQfHFeZQFHuA4IJfApdajdalyuVvpLlCp1V7bNoWY4LyX04Ijow== To: netdev@vger.kernel.org Cc: Marek Vasut , Krzysztof Kozlowski , "David S. Miller" , Aleksander Jan Bajkowski , Andrew Lunn , Conor Dooley , Eric Dumazet , Florian Fainelli , Heiner Kallweit , Ivan Galkin , Jakub Kicinski , Krzysztof Kozlowski , Michael Klein , Paolo Abeni , Rob Herring , Russell King , Vladimir Oltean , devicetree@vger.kernel.org Subject: [net-next,PATCH v3 2/3] dt-bindings: net: realtek,rtl82xx: Document realtek,*-ssc-enable property Date: Thu, 18 Dec 2025 18:36:13 +0100 Message-ID: <20251218173718.12878-2-marek.vasut@mailbox.org> In-Reply-To: <20251218173718.12878-1-marek.vasut@mailbox.org> References: <20251218173718.12878-1-marek.vasut@mailbox.org> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-MBO-RS-ID: 04fac4b9fc6dda07fd9 X-MBO-RS-META: nc6dxpk4t616b74uj64hwr6rrhydcj8k Document support for spread spectrum clocking (SSC) on RTL8211F(D)(I)-CG, RTL8211FS(I)(-VS)-CG, RTL8211FG(I)(-VS)-CG PHYs. Introduce DT properties 'realtek,clkout-ssc-enable', 'realtek,rxc-ssc-enable' and 'realtek,sysclk-ssc-enable' which control CLKOUT, RXC and SYSCLK SSC spread spectrum clocking enablement on these signals. These clock are not exposed via the clock API, therefore assigned-clock-sscs property does not apply. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Marek Vasut --- Cc: "David S. Miller" Cc: Aleksander Jan Bajkowski Cc: Andrew Lunn Cc: Conor Dooley Cc: Eric Dumazet Cc: Florian Fainelli Cc: Heiner Kallweit Cc: Ivan Galkin Cc: Jakub Kicinski Cc: Krzysztof Kozlowski Cc: Michael Klein Cc: Paolo Abeni Cc: Rob Herring Cc: Russell King Cc: Vladimir Oltean Cc: devicetree@vger.kernel.org Cc: netdev@vger.kernel.org --- V2: Split SSC clock control for each CLKOUT, RXC, SYSCLK signal V3: - Add RB from krzk - Update commit subject, use realtek,*-ssc-enable to be accurate --- .../devicetree/bindings/net/realtek,rtl82xx.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/net/realtek,rtl82xx.yaml b/Documentation/devicetree/bindings/net/realtek,rtl82xx.yaml index eafcc2f3e3d66..45033c31a2d51 100644 --- a/Documentation/devicetree/bindings/net/realtek,rtl82xx.yaml +++ b/Documentation/devicetree/bindings/net/realtek,rtl82xx.yaml @@ -50,6 +50,21 @@ properties: description: Disable CLKOUT clock, CLKOUT clock default is enabled after hardware reset. + realtek,clkout-ssc-enable: + type: boolean + description: + Enable CLKOUT SSC mode, CLKOUT SSC mode default is disabled after hardware reset. + + realtek,rxc-ssc-enable: + type: boolean + description: + Enable RXC SSC mode, RXC SSC mode default is disabled after hardware reset. + + realtek,sysclk-ssc-enable: + type: boolean + description: + Enable SYSCLK SSC mode, SYSCLK SSC mode default is disabled after hardware reset. + wakeup-source: type: boolean description: -- 2.51.0