From: Vladimir Oltean <olteanv@gmail.com>
To: Daniel Golle <daniel@makrotopia.org>
Cc: Hauke Mehrtens <hauke@hauke-m.de>, Andrew Lunn <andrew@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Russell King <linux@armlinux.org.uk>,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Chen Minqiang <ptpt52@gmail.com>,
Xinfa Deng <xinfa.deng@gl-inet.com>
Subject: Re: [PATCH net-next 3/3] net: dsa: mxl-gsw1xx: add support for Intel GSW150
Date: Thu, 15 Jan 2026 00:38:48 +0200 [thread overview]
Message-ID: <20260114223848.4s6r4ncuzstq6e4e@skbuf> (raw)
In-Reply-To: <b179f57a3997a84ae15fd3860c2735a7846d6a6b.1768273936.git.daniel@makrotopia.org>
On Tue, Jan 13, 2026 at 03:25:34AM +0000, Daniel Golle wrote:
> Add support for the Intel GSW150 (aka. Lantiq PEB7084) switch IC to
> the mxl-gsw1xx driver. This switch comes with 5 Gigabit Ethernet
> copper ports (Intel XWAY PHY11G (xRX v1.2 integrated) PHYs) as well as
> one GMII/RGMII and one RGMII port.
>
> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> ---
> drivers/net/dsa/lantiq/mxl-gsw1xx.c | 63 ++++++++++++++++++++++++++---
> drivers/net/dsa/lantiq/mxl-gsw1xx.h | 2 +
> 2 files changed, 60 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/net/dsa/lantiq/mxl-gsw1xx.c b/drivers/net/dsa/lantiq/mxl-gsw1xx.c
> index 4390c2df2e4bd..1c6a5456a5caf 100644
> --- a/drivers/net/dsa/lantiq/mxl-gsw1xx.c
> +++ b/drivers/net/dsa/lantiq/mxl-gsw1xx.c
> +static void gsw150_phylink_get_caps(struct dsa_switch *ds, int port,
> + struct phylink_config *config)
> +{
> + config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
> + MAC_10 | MAC_100 | MAC_1000;
> +
> + switch (port) {
> + case 0: /* port 0~4: built-in 1GE PHYs */
> + case 1:
> + case 2:
> + case 3:
> + case 4:
I think there's a syntax for this, see mt7530_mac_port_get_caps():
case 0 ... 4:
also, you can drop "port X: " from the comments.
> + __set_bit(PHY_INTERFACE_MODE_INTERNAL,
> + config->supported_interfaces);
> + break;
> + case 5: /* port 5: GMII or RGMII */
> + __set_bit(PHY_INTERFACE_MODE_GMII,
> + config->supported_interfaces);
> + fallthrough;
> + case 6: /* port 6: RGMII */
> + phy_interface_set_rgmii(config->supported_interfaces);
> + break;
> + }
> +
> + gsw1xx_phylink_get_lpi_caps(config);
> }
prev parent reply other threads:[~2026-01-14 22:38 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-13 3:24 [PATCH net-next 0/3] net: dsa: lantiq: add support for Intel GSW150 Daniel Golle
2026-01-13 3:24 ` [PATCH net-next 1/3] dt-bindings: net: dsa: lantiq,gswip: add " Daniel Golle
2026-01-13 3:25 ` [PATCH net-next 2/3] net: dsa: lantiq: allow arbitrary MII registers Daniel Golle
2026-01-14 22:37 ` Vladimir Oltean
2026-01-13 3:25 ` [PATCH net-next 3/3] net: dsa: mxl-gsw1xx: add support for Intel GSW150 Daniel Golle
2026-01-14 22:38 ` Vladimir Oltean [this message]
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