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Sun, 25 Jan 2026 04:16:55 -0800 From: Gal Pressman To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , CC: Igor Russkikh , Boris Pismenny , Saeed Mahameed , Leon Romanovsky , "Tariq Toukan" , Mark Bloch , David Ahern , Simon Horman , Alexander Duyck , , Gal Pressman Subject: [PATCH net-next 0/3] Single MSS length in UDP GSO_PARTIAL Date: Sun, 25 Jan 2026 14:16:46 +0200 Message-ID: <20260125121649.778086-1-gal@nvidia.com> X-Mailer: git-send-email 2.40.1 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00022573:EE_|CH3PR12MB8185:EE_ X-MS-Office365-Filtering-Correlation-Id: 42de47b3-c204-497f-0d36-08de5c0bacde X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|7416014|376014|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?Zx0EaHiNOyMF3qyvhldILKHqEjrPRvtMPyjWqzBR23yj9hg2KMX9NDYk7DBh?= =?us-ascii?Q?Mte1A/BdE/IFfeBjwK7xR/P1VSkDnMz860HDQe3xVOSmMZiyqFg/d/HOyyBS?= =?us-ascii?Q?b+GPWH0ChYeJ4A4EMuujRhViF7amRh2NDZkESwyVJgOlcjtZmSeucroRzBDm?= =?us-ascii?Q?7vxk8ltNorEwx3Kt2Je59CO9ZUWZ24YwQLgrFNDNV6tNTUm9tlq0mfe+mZ3N?= =?us-ascii?Q?WNkxd92yjlDQ1KSFzuDyYtimP6x3xrcFIcGUgmYp3t8Z5CDlrIMK4oVZ97pT?= =?us-ascii?Q?qBRarfV0uUjMRcJVulmktyjasTj9Skq5rU/0LL3dGWTzsOtR3P0IYJ98mKK+?= =?us-ascii?Q?euCBB69D6QLzXWX+Q3zOJtcadFk59sFFuREdUSRVh1EzRUO3N87gTjT5TkYp?= =?us-ascii?Q?H4HEtyzRyoJkGPahk1YSsZN80shWYeHD8HTKvJSVGHGIQD0CNumVfzhGJL3V?= =?us-ascii?Q?/hsDLBMrQdmjy+6SqzmPX6jYvsUwTtvuYnMueD/l+vDqTFlCjFHe4Y6BYJ9K?= =?us-ascii?Q?/8vuQQwZBJ727+viV9Ed1cPU2DgRyrWctt6khllcgsXwxeKelvXkHu+dM04+?= =?us-ascii?Q?wRoRXrSNmPMHMmIjuiCApUmXE+D0iXHjYrj481J6rku/VBLugR/cz/TYeFJh?= =?us-ascii?Q?Lp7oNJDb31NCKveEdGqMTnCfmj9oybjkJiE7MIo7WU+BORl2uI3uwtCS1/JN?= =?us-ascii?Q?OXDjI3KbWK5NaZFE5NabzuMb5MLGclir/uVSHJHFmoIS0ewblFbZfcOS2kbp?= =?us-ascii?Q?xjdxiiY82APpsamXQ8K97xWSykcodrdF4Q8BzvTw2b7QI+RZbKzJ8nYGHyGR?= =?us-ascii?Q?gYSmVGkBKxpJM50BFaVR6Rk3nTea9dDIJP89q6+rTwt7aLNKhgmljdLOf433?= =?us-ascii?Q?mqxm6ajoAdjFYN3BNtcrLXTykUbgLkDUcOYsUermphpJrtY5N2+Je+yM7pn9?= =?us-ascii?Q?2JuLBITQLEhfAIfyq5caiGW7x3tfZHvuVaxCoMVpug5WeFzhZJNRVCU0RYcW?= =?us-ascii?Q?37xZhGaMmDun4a7334TSWhLFXxpx8QaNdxJ41YUJCjPq4kdonrZDxbYGyH6t?= =?us-ascii?Q?jlz378KcOIJGXdnCJ97uwvVXNZAbC3C3mwiGG1q+k1dHdpMZ67HHBzup+dZm?= =?us-ascii?Q?w8hyrocZfv9uHBTbvWHMjdKBMfFvMsAMbzq/a/V9/2JcVHka0Akjn61xZHDM?= =?us-ascii?Q?FZrAFxtsRDQA3/I3kyvMTxYB/OZQ0pr0zdg5sBAbVqmPUeTFinRgGp9WTQSU?= =?us-ascii?Q?i3KYP3l4ZraUQxOh4EzqzvOvg2Z+JgNthL2bQXw84mxjgy1UbIFJG8Ghpvs9?= =?us-ascii?Q?rHR1Jf4naJcEyYIcpKP2KGHBoB6zsniFruVl2xNhK8O6uX8TvZxGuaiTh/pp?= =?us-ascii?Q?X4K5Mat4WwrLjSn8Dmc9/gi5VWtTB8qVqpytTA0zx+Lkp+CZA3OGveB/rthy?= =?us-ascii?Q?SOuAK5Ob0/3d2LnZOCGCrSzr7d6/ykq2smsP+k5qMSytqUSG+3FMbnqLFAyy?= =?us-ascii?Q?nOpxG0F6N8hiuqOzS41DuTqCh4cwe2+Zf0s29245dXHSm8dl0oU3XfnEOwt0?= =?us-ascii?Q?CblfYorgWPTAbMK9OH9vhFAcWM9uC2K1XR9IICp0dxva/VMb0L2W6lkt32u5?= =?us-ascii?Q?k9QqPsCDk7IWnDhjnqbnSGXM0gQL/hTF9XTsYRIAUhBpAUPUudj7n8CvXI7y?= =?us-ascii?Q?Sgd5KA=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(7416014)(376014)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Jan 2026 12:17:14.5964 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 42de47b3-c204-497f-0d36-08de5c0bacde X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00022573.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8185 This series addresses an inconsistency in how UDP GSO_PARTIAL handles the UDP header length field. Currently, when GSO_PARTIAL segmentation is used, the UDP header length contains the large MSS size, requiring drivers to manually adjust it before transmitting. This is inconsistent with how tunnel GSO_PARTIAL handles outer headers in UDP tunnels, where the length is set to the single segment size. This was originally suggested by Alexander Duyck back in 2018: https://lore.kernel.org/netdev/CAKgT0UcdnUWgr3KQ=RnLKigokkiUuYefmL-ePpDvJOBNpKScFA@mail.gmail.com/ The first patch fixes the core UDP offload code to set the UDP length field to the single segment size (gso_size + UDP header) instead of the large MSS size. This provides hardware with a proper template length value for final segmentation. The subsequent patches remove the now redundant UDP header length adjustments from the mlx5e and aquantia drivers, as the core code now handles this correctly. I couldn't find any other drivers that support UDP GSO_PARTIAL; idpf supports UDP segmentation, but it does not use GSO_PARTIAL. Gal Pressman (3): udp: gso: Use single MSS length in UDP header for GSO_PARTIAL net/mlx5e: Remove redundant UDP length adjustment with GSO_PARTIAL net: aquantia: Remove redundant UDP length adjustment with GSO_PARTIAL drivers/net/ethernet/aquantia/atlantic/aq_nic.c | 3 --- .../mellanox/mlx5/core/en_accel/en_accel.h | 17 ----------------- net/ipv4/udp_offload.c | 6 ++++-- 3 files changed, 4 insertions(+), 22 deletions(-) -- 2.40.1