[PATCH net-next] uapi: net: mii: correct 100BASE4 bit descriptions

[PATCH net-next] uapi: net: mii: correct 100BASE4 bit descriptions

[Ethan Nelson-Moore]

The 100BASE4 bits in MII registers indicate 100BASE-T4, as can be seen
in Ethernet PHY documentation (such as the datasheet linked below), not
4K packets. Correct the comments describing these bits.

Link: https://www.ti.com/lit/ds/symlink/dp83849c.pdf
Signed-off-by: Ethan Nelson-Moore <enelsonmoore@gmail.com>
---
 include/uapi/linux/mii.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/uapi/linux/mii.h b/include/uapi/linux/mii.h
index 39f7c44baf53..ba6f8a4fe0a6 100644
--- a/include/uapi/linux/mii.h
+++ b/include/uapi/linux/mii.h
@@ -66,7 +66,7 @@
 #define BMSR_10FULL		0x1000	/* Can do 10mbps, full-duplex  */
 #define BMSR_100HALF		0x2000	/* Can do 100mbps, half-duplex */
 #define BMSR_100FULL		0x4000	/* Can do 100mbps, full-duplex */
-#define BMSR_100BASE4		0x8000	/* Can do 100mbps, 4k packets  */
+#define BMSR_100BASE4		0x8000	/* Can do 100BASE-T4           */
 
 /* Advertisement control register. */
 #define ADVERTISE_SLCT		0x001f	/* Selector bits               */
@@ -79,7 +79,7 @@
 #define ADVERTISE_1000XPAUSE	0x0080	/* Try for 1000BASE-X pause    */
 #define ADVERTISE_100FULL	0x0100	/* Try for 100mbps full-duplex */
 #define ADVERTISE_1000XPSE_ASYM	0x0100	/* Try for 1000BASE-X asym pause */
-#define ADVERTISE_100BASE4	0x0200	/* Try for 100mbps 4k packets  */
+#define ADVERTISE_100BASE4	0x0200	/* Try for 100BASE-T4          */
 #define ADVERTISE_PAUSE_CAP	0x0400	/* Try for pause               */
 #define ADVERTISE_PAUSE_ASYM	0x0800	/* Try for asymetric pause     */
 #define ADVERTISE_RESV		0x1000	/* Unused...                   */
@@ -102,7 +102,7 @@
 #define LPA_1000XPAUSE		0x0080	/* Can do 1000BASE-X pause     */
 #define LPA_100FULL		0x0100	/* Can do 100mbps full-duplex  */
 #define LPA_1000XPAUSE_ASYM	0x0100	/* Can do 1000BASE-X pause asym*/
-#define LPA_100BASE4		0x0200	/* Can do 100mbps 4k packets   */
+#define LPA_100BASE4		0x0200	/* Can do 100BASE-T4           */
 #define LPA_PAUSE_CAP		0x0400	/* Can pause                   */
 #define LPA_PAUSE_ASYM		0x0800	/* Can pause asymetrically     */
 #define LPA_RESV		0x1000	/* Unused...                   */
-- 
2.43.0

Re: [PATCH net-next] uapi: net: mii: correct 100BASE4 bit descriptions

[Andrew Lunn]

On Wed, Jan 28, 2026 at 09:17:35PM -0800, Ethan Nelson-Moore wrote:
> The 100BASE4 bits in MII registers indicate 100BASE-T4, as can be seen
> in Ethernet PHY documentation (such as the datasheet linked below), not
> 4K packets. Correct the comments describing these bits.
> 
> Link: https://www.ti.com/lit/ds/symlink/dp83849c.pdf

It is much better to reference IEEE 802.3, clause 22, section X.Y.Z.

The standard is free to download.

I do wounder where the 4K comment comes from. Did 100BASE-T4 introduce
the concept of jumbo packets?

    Andrew

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