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From: Ivan Vecera <ivecera@redhat.com>
To: netdev@vger.kernel.org
Cc: Aleksandr Loktionov <aleksandr.loktionov@intel.com>,
	Alexander Lobakin <aleksander.lobakin@intel.com>,
	Andrew Lunn <andrew+netdev@lunn.ch>,
	Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Jiri Pirko <jiri@resnulli.us>,
	Jonathan Lemon <jonathan.lemon@gmail.com>,
	Leon Romanovsky <leon@kernel.org>, Mark Bloch <mbloch@nvidia.com>,
	Paolo Abeni <pabeni@redhat.com>,
	Prathosh Satish <Prathosh.Satish@microchip.com>,
	Przemek Kitszel <przemyslaw.kitszel@intel.com>,
	Richard Cochran <richardcochran@gmail.com>,
	Saeed Mahameed <saeedm@nvidia.com>,
	Tariq Toukan <tariqt@nvidia.com>,
	Tony Nguyen <anthony.l.nguyen@intel.com>,
	Vadim Fedorenko <vadim.fedorenko@linux.dev>,
	intel-wired-lan@lists.osuosl.org, linux-kernel@vger.kernel.org,
	linux-rdma@vger.kernel.org
Subject: [PATCH net-next v3 5/9] dpll: zl3073x: Add support for mux pin type
Date: Fri, 30 Jan 2026 17:53:34 +0100	[thread overview]
Message-ID: <20260130165338.101860-6-ivecera@redhat.com> (raw)
In-Reply-To: <20260130165338.101860-1-ivecera@redhat.com>

Add parsing for the "mux" string in the 'connection-type' pin property
mapping it to DPLL_PIN_TYPE_MUX.

Recognizing this type in the driver allows these pins to be taken as
parent pins for pin-on-pin pins coming from different modules (e.g.
network drivers).

Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
---
 drivers/dpll/zl3073x/prop.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/dpll/zl3073x/prop.c b/drivers/dpll/zl3073x/prop.c
index 4ed153087570b..ad1f099cbe2b5 100644
--- a/drivers/dpll/zl3073x/prop.c
+++ b/drivers/dpll/zl3073x/prop.c
@@ -249,6 +249,8 @@ struct zl3073x_pin_props *zl3073x_pin_props_get(struct zl3073x_dev *zldev,
 			props->dpll_props.type = DPLL_PIN_TYPE_INT_OSCILLATOR;
 		else if (!strcmp(type, "synce"))
 			props->dpll_props.type = DPLL_PIN_TYPE_SYNCE_ETH_PORT;
+		else if (!strcmp(type, "mux"))
+			props->dpll_props.type = DPLL_PIN_TYPE_MUX;
 		else
 			dev_warn(zldev->dev,
 				 "Unknown or unsupported pin type '%s'\n",
-- 
2.52.0


  parent reply	other threads:[~2026-01-30 16:54 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-30 16:53 [PATCH net-next v3 0/9] dpll: Core improvements and ice E825-C SyncE support Ivan Vecera
2026-01-30 16:53 ` [PATCH net-next v3 1/9] dpll: Allow associating dpll pin with a firmware node Ivan Vecera
2026-01-30 17:50   ` [Intel-wired-lan] " Loktionov, Aleksandr
2026-01-30 16:53 ` [PATCH net-next v3 2/9] dpll: zl3073x: Associate pin with fwnode handle Ivan Vecera
2026-01-30 16:53 ` [PATCH net-next v3 3/9] dpll: Add notifier chain for dpll events Ivan Vecera
2026-01-30 16:53 ` [PATCH net-next v3 4/9] dpll: Support dynamic pin index allocation Ivan Vecera
2026-01-30 17:50   ` [Intel-wired-lan] " Loktionov, Aleksandr
2026-01-30 16:53 ` Ivan Vecera [this message]
2026-01-30 16:53 ` [PATCH net-next v3 6/9] dpll: Enhance and consolidate reference counting logic Ivan Vecera
2026-01-30 17:51   ` [Intel-wired-lan] " Loktionov, Aleksandr
2026-01-30 16:53 ` [PATCH net-next v3 7/9] dpll: Add reference count tracking support Ivan Vecera
2026-01-30 17:52   ` [Intel-wired-lan] " Loktionov, Aleksandr
2026-01-30 16:53 ` [PATCH net-next v3 8/9] drivers: Add support for DPLL reference count tracking Ivan Vecera
2026-01-30 17:52   ` [Intel-wired-lan] " Loktionov, Aleksandr
2026-01-30 16:53 ` [PATCH net-next v3 9/9] ice: dpll: Support E825-C SyncE and dynamic pin discovery Ivan Vecera

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