From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from www2881.sakura.ne.jp (www2881.sakura.ne.jp [49.212.198.91]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C4F17328B56 for ; Sat, 31 Jan 2026 16:30:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=49.212.198.91 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769877058; cv=none; b=qwKjHQ8N3kSe0TgAoAJjf5GBL7eIG8zAQsu6PogaV5ZbesP/kwV9zVZzi95ag3R5qMxnY9euoluFxb0YWpLotn7HiGp9JwBKm49SsDMaXmMN9H51mQeN0jC5lxYhBMgsMzizlEUdHf1XACgWsgBFKhMOFhJ3/6o7xfEXlTc0k7s= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769877058; c=relaxed/simple; bh=bsF4MWdS/mvtf8kkXk66PIdcw+5uB+VYsChcAgHVyvU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bxU/fT0z5NtqPAeXOzgIqHN+PNpMoYHn/9V9tEqDfPdo+C1SvqXBGZGepi9RHZuJmSvDNm3wISvU0/z61LEOsUUkT0eefST+I8f59X8Frc7LulTRflj+bEWY0gibKBovM84ues3dxpjHw2Zkdx+dyyPYzUi1iCI7Wj0b+esI8UU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=enjuk.jp; spf=pass smtp.mailfrom=enjuk.jp; dkim=pass (2048-bit key) header.d=enjuk.jp header.i=@enjuk.jp header.b=tswXrpId; arc=none smtp.client-ip=49.212.198.91 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=enjuk.jp Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=enjuk.jp Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=enjuk.jp header.i=@enjuk.jp header.b="tswXrpId" Received: from ms-a2 (248.212.13.160.dy.iij4u.or.jp [160.13.212.248]) (authenticated bits=0) by www2881.sakura.ne.jp (8.16.1/8.16.1) with ESMTPSA id 60VGUsmQ039327 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Sun, 1 Feb 2026 01:30:54 +0900 (JST) (envelope-from kohei@enjuk.jp) DKIM-Signature: a=rsa-sha256; bh=WYHECLqIowuumL8zjbgitFuB0m6Aqj/Lu6CHXxY5A6k=; c=relaxed/relaxed; d=enjuk.jp; h=From:To:Subject:Date:Message-ID; s=rs20251215; t=1769877054; v=1; b=tswXrpIdKGoR5Oynz75znwQLqbFYzIefazHttza7Q9yI7dDxITO18a03ODDo/WFX 2r1KKtUoHCmzKN5b8VJfNHF+X1jGPm5C4uClkDPZ5vpHkEBQkbe8zVUiJ/biEv/9 8kn5lYOTfZCjsXENCqBwrlxVuBYaZMnKph0TXyCkKHwcedLWwEsUfqzh3BZLnzdr TQOT4f8L9wGUSYt8xvzlNVRIa9w+YIS2cA+8cxjiQ5ZdCDRvvVg+PK2EgKcg80yd wNyAz4w/uvj2ojHP8CB+6VokNVPtiEnViUX55gJJ+uyNLUE23iphFx/9Pdu30adz aI8HWyQOzoaMV3zJPqcQaA== From: Kohei Enju To: intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org Cc: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Vitaly Lifshits , Simon Horman , Aleksandr Loktionov , kohei.enju@gmail.com, Kohei Enju Subject: [PATCH v2 iwl-next 1/3] igc: prepare for RSS key get/set support Date: Sat, 31 Jan 2026 16:29:36 +0000 Message-ID: <20260131163037.88108-2-kohei@enjuk.jp> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260131163037.88108-1-kohei@enjuk.jp> References: <20260131163037.88108-1-kohei@enjuk.jp> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Store the RSS key inside struct igc_adapter and introduce the igc_write_rss_key() helper function. This allows the driver to program the RSSRK registers using a persistent RSS key, instead of using a stack-local buffer in igc_setup_mrqc(). This is a preparation patch for adding RSS key get/set support in subsequent changes, and no functional change is intended in this patch. Signed-off-by: Kohei Enju --- drivers/net/ethernet/intel/igc/igc.h | 3 +++ drivers/net/ethernet/intel/igc/igc_ethtool.c | 20 ++++++++++++++++++++ drivers/net/ethernet/intel/igc/igc_main.c | 8 ++++---- 3 files changed, 27 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/intel/igc/igc.h index a427f05814c1..dd159397d191 100644 --- a/drivers/net/ethernet/intel/igc/igc.h +++ b/drivers/net/ethernet/intel/igc/igc.h @@ -30,6 +30,7 @@ void igc_ethtool_set_ops(struct net_device *); #define MAX_ETYPE_FILTER 8 #define IGC_RETA_SIZE 128 +#define IGC_RSS_KEY_SIZE 40 /* SDP support */ #define IGC_N_EXTTS 2 @@ -302,6 +303,7 @@ struct igc_adapter { unsigned int nfc_rule_count; u8 rss_indir_tbl[IGC_RETA_SIZE]; + u8 rss_key[IGC_RSS_KEY_SIZE]; unsigned long link_check_timeout; struct igc_info ei; @@ -360,6 +362,7 @@ unsigned int igc_get_max_rss_queues(struct igc_adapter *adapter); void igc_set_flag_queue_pairs(struct igc_adapter *adapter, const u32 max_rss_queues); int igc_reinit_queues(struct igc_adapter *adapter); +void igc_write_rss_key(struct igc_adapter *adapter); void igc_write_rss_indir_tbl(struct igc_adapter *adapter); bool igc_has_link(struct igc_adapter *adapter); void igc_reset(struct igc_adapter *adapter); diff --git a/drivers/net/ethernet/intel/igc/igc_ethtool.c b/drivers/net/ethernet/intel/igc/igc_ethtool.c index 3172cdbca9cc..1b4075e7e8e6 100644 --- a/drivers/net/ethernet/intel/igc/igc_ethtool.c +++ b/drivers/net/ethernet/intel/igc/igc_ethtool.c @@ -1460,6 +1460,26 @@ static int igc_ethtool_set_rxnfc(struct net_device *dev, } } +/** + * igc_write_rss_key - Program the RSS key into device registers + * @adapter: board private structure + * + * Write the RSS key stored in adapter->rss_key to the IGC_RSSRK registers. + * Each 32-bit chunk of the key is read using get_unaligned_le32() and written + * to the appropriate register. + */ +void igc_write_rss_key(struct igc_adapter *adapter) +{ + struct igc_hw *hw = &adapter->hw; + u32 val; + int i; + + for (i = 0; i < IGC_RSS_KEY_SIZE / 4; i++) { + val = get_unaligned_le32(&adapter->rss_key[i * 4]); + wr32(IGC_RSSRK(i), val); + } +} + void igc_write_rss_indir_tbl(struct igc_adapter *adapter) { struct igc_hw *hw = &adapter->hw; diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c index 89a321a344d2..98410f9d7828 100644 --- a/drivers/net/ethernet/intel/igc/igc_main.c +++ b/drivers/net/ethernet/intel/igc/igc_main.c @@ -778,11 +778,8 @@ static void igc_setup_mrqc(struct igc_adapter *adapter) struct igc_hw *hw = &adapter->hw; u32 j, num_rx_queues; u32 mrqc, rxcsum; - u32 rss_key[10]; - netdev_rss_key_fill(rss_key, sizeof(rss_key)); - for (j = 0; j < 10; j++) - wr32(IGC_RSSRK(j), rss_key[j]); + igc_write_rss_key(adapter); num_rx_queues = adapter->rss_queues; @@ -5046,6 +5043,9 @@ static int igc_sw_init(struct igc_adapter *adapter) pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word); + /* init RSS key */ + netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key)); + /* set default ring sizes */ adapter->tx_ring_count = IGC_DEFAULT_TXD; adapter->rx_ring_count = IGC_DEFAULT_RXD; -- 2.51.0