From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2796B214A64; Tue, 3 Feb 2026 04:09:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770091759; cv=none; b=WEImIxbypUWe4F/Ct3ikdEc9vS29yObnYZgRG7DJ4xd+1DNTd7Mxlj7hrCr9BLs5/yt6S5vyb32zGySiZkPPdbqnKKA6qasARpSuWV8M7M1CtMzEI4I6aAVIo49nhDGmLvGv3ZZde5C+9SpD6Mnpz/Aurw97rWw+9j0ImsjLlb4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770091759; c=relaxed/simple; bh=IXDilzVCem2iDthXSKXW8yichEDMzvfMuferk/Hty3E=; h=Date:From:To:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=crnMwpGFP75dYZ6NEYBawx+hWcR5DwPhHzUQZViV7QuN3yZTXt/HcaVd30UGgm2bYdB2IdA34w1K0qqGuT/QfWzRiCreLdNKVPv9MqVn2PUt8HUTNwdCaQxVZRbl2VuUTDA4iIwjWFgZKnzoBD6/oMEqIhHUAP/+rMRZUOsFnXk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=t4KoajWe; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="t4KoajWe" Received: by smtp.kernel.org (Postfix) with ESMTPSA id BDE7CC116D0; Tue, 3 Feb 2026 04:09:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1770091759; bh=IXDilzVCem2iDthXSKXW8yichEDMzvfMuferk/Hty3E=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=t4KoajWevWwa5LfWTbOIjq718jkE5hU4RMhnXxLW9ANadmh8GZ4VmaVeziGrcOODX db8jmpDFoO5gTh0JhFMW8OFmsW79hfyqUrFeFshLJe1aBsl/W0xH7XinTKU8Y+cyTp xP/HJVh8nkAdLYUcvMovug+QSi7DypGCnOWlbd43w+y+OsiuM2K3FK2SbIy1TwyRu0 ImYC/DVvZEcyjGaBK5efDxhh475oPZR6CjeXh+wwXfRkRD+dDLsVDyxR2pwB4IU2J2 zJJSDC6/Vsn5wE847REIM9Nis511s752K9cmLuOoTWzbTvp4oZd/FnmXqyaFwott/z XTR2QZ8s2+9Jg== Date: Mon, 2 Feb 2026 20:09:16 -0800 From: Jakub Kicinski To: Tariq Toukan Cc: Eric Dumazet , Paolo Abeni , Andrew Lunn , "David S. Miller" , Donald Hunter , Jiri Pirko , Jonathan Corbet , Saeed Mahameed , "Leon Romanovsky" , Mark Bloch , , , , , Gal Pressman , Moshe Shemesh , Carolina Jubran , Cosmin Ratiu , Jiri Pirko , Randy Dunlap , Simon Horman , Krzysztof Kozlowski Subject: Re: [PATCH net-next V7 00/14] devlink and mlx5: Support cross-function rate scheduling Message-ID: <20260202200916.2b71ccdc@kernel.org> In-Reply-To: <20260128112544.1661250-1-tariqt@nvidia.com> References: <20260128112544.1661250-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Wed, 28 Jan 2026 13:25:30 +0200 Tariq Toukan wrote: > This series by Cosmin and Jiri adds support for cross-function rate > scheduling in devlink and mlx5. > See detailed explanation by Cosmin below [1]. I'll apply the trivial patches (3, 5) to avoid the reposts. Please add driver tests exercising this code, there's high risk of regressions with all this complexity and nested locking. What devices will support this? Is CX7 enough to test?