[PATCH 0/5] riscv: dts: sifive: fu740: Fix compatible strings per IP versioning

[PATCH 0/5] riscv: dts: sifive: fu740: Fix compatible strings per IP versioning

[Max Hsu]

This series corrects the device tree compatible strings for the SiFive
FU740-C000 SoC to comply with the SiFive IP versioning scheme documented
in Documentation/devicetree/bindings/sifive/sifive-blocks-ip-versioning.txt.

According to the versioning guidelines, each SoC should use SoC-specific
compatible strings even when IP blocks are functionally identical across
different SoCs. This ensures proper hardware identification and allows
for future flexibility.

The series updates both the ethernet (MACB) and PLIC compatible strings
for the FU740, adds the corresponding device tree binding documentation,
and adds driver support for the FU740 ethernet controller.

Changes in this series:
- Patch 1: Add FU740 ethernet compatible string to the Cadence MACB
  binding documentation
- Patch 2: Add FU740 PLIC compatible string to the PLIC binding
  documentation
- Patch 3: Add FU740-specific configuration to the Cadence MACB driver;
  the FU740 ethernet controller is functionally identical to FU540, so
  it reuses the existing implementation
- Patch 4: Update the FU740 DTS to use the correct ethernet compatible
  string "sifive,fu740-c000-gem"
- Patch 5: Update the FU740 DTS to use the correct PLIC compatible
  string "sifive,fu740-c000-plic"

Tested on HiFive Unmatched (FU740-C000) hardware with network
functionality verified.

Signed-off-by: Max Hsu <max.hsu@sifive.com>
---
Max Hsu (5):
      dt-bindings: net: macb: Add SiFive FU740-C000 support
      dt-bindings: interrupt-controller: Add SiFive FU740-C000 PLIC
      net: macb: Add support for SiFive FU740-C000
      riscv: dts: sifive: fu740: Use correct ethernet compatible string
      riscv: dts: sifive: fu740: Use correct PLIC compatible string

 .../interrupt-controller/sifive,plic-1.0.0.yaml         |  1 +
 Documentation/devicetree/bindings/net/cdns,macb.yaml    |  7 +++++--
 arch/riscv/boot/dts/sifive/fu740-c000.dtsi              |  4 ++--
 drivers/net/ethernet/cadence/macb_main.c                | 17 ++++++++++++++---
 4 files changed, 22 insertions(+), 7 deletions(-)
---
base-commit: 9702969978695d9a699a1f34771580cdbb153b33
change-id: 20260111-fu740-277eee3deae2

Best regards,
-- 
Max Hsu <max.hsu@sifive.com>

[PATCH 1/5] dt-bindings: net: macb: Add SiFive FU740-C000 support

[Max Hsu]

Add the SiFive FU740-C000 ethernet controller compatible string to the
Cadence MACB binding documentation.

The FU740 ethernet controller uses the same GEMGXL management block as
the FU540, which is tightly coupled with the Cadence MACB IP. This
follows the SiFive IP versioning scheme which requires SoC-specific
compatible strings for proper hardware identification.

Signed-off-by: Max Hsu <max.hsu@sifive.com>
---
 Documentation/devicetree/bindings/net/cdns,macb.yaml | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml
index cb14c35ba996..b46dde1da170 100644
--- a/Documentation/devicetree/bindings/net/cdns,macb.yaml
+++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml
@@ -63,6 +63,7 @@ properties:
           - mobileye,eyeq5-gem        # Mobileye EyeQ5 SoCs
           - raspberrypi,rp1-gem       # Raspberry Pi RP1 gigabit ethernet interface
           - sifive,fu540-c000-gem     # SiFive FU540-C000 SoC
+          - sifive,fu740-c000-gem     # SiFive FU740-C000 SoC
 
       - items:
           - enum:
@@ -74,7 +75,7 @@ properties:
     minItems: 1
     items:
       - description: Basic register set
-      - description: GEMGXL Management block registers on SiFive FU540-C000 SoC
+      - description: GEMGXL Management block registers on SiFive FU540/FU740 SoCs
 
   interrupts:
     minItems: 1
@@ -181,7 +182,9 @@ allOf:
         properties:
           compatible:
             contains:
-              const: sifive,fu540-c000-gem
+              enum:
+                - sifive,fu540-c000-gem
+                - sifive,fu740-c000-gem
     then:
       properties:
         reg:

-- 
2.43.0

Re: [PATCH 1/5] dt-bindings: net: macb: Add SiFive FU740-C000 support

[Conor Dooley]

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On Fri, Feb 20, 2026 at 04:27:05PM +0800, Max Hsu wrote:
> Add the SiFive FU740-C000 ethernet controller compatible string to the
> Cadence MACB binding documentation.
> 
> The FU740 ethernet controller uses the same GEMGXL management block as
> the FU540, which is tightly coupled with the Cadence MACB IP. This
> follows the SiFive IP versioning scheme which requires SoC-specific
> compatible strings for proper hardware identification.

Your rationale for this change is misguided, as this is not a SiFive IP,
so that document does not apply. On the other hand, the general rules
for devicetrees require this so this just means a change in the
rationale provided.

> 
> Signed-off-by: Max Hsu <max.hsu@sifive.com>
> ---
>  Documentation/devicetree/bindings/net/cdns,macb.yaml | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml
> index cb14c35ba996..b46dde1da170 100644
> --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml
> +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml
> @@ -63,6 +63,7 @@ properties:
>            - mobileye,eyeq5-gem        # Mobileye EyeQ5 SoCs
>            - raspberrypi,rp1-gem       # Raspberry Pi RP1 gigabit ethernet interface
>            - sifive,fu540-c000-gem     # SiFive FU540-C000 SoC
> +          - sifive,fu740-c000-gem     # SiFive FU740-C000 SoC

I don't think this is right, since it is identical to the one on the
fu540 (as evidenced by how it has worked until now and the contents of
your driver change). I think you should add the fu740 with a fallback to
the fu540, like the devices from Microchip that fall back to the
microchip,sama7g5-gem. The rest of the changes to the driver and binding
can then be dropped as they'll be redundant.

Thanks,
Conor.

pw-bot: changes-requested

>  
>        - items:
>            - enum:
> @@ -74,7 +75,7 @@ properties:
>      minItems: 1
>      items:
>        - description: Basic register set
> -      - description: GEMGXL Management block registers on SiFive FU540-C000 SoC
> +      - description: GEMGXL Management block registers on SiFive FU540/FU740 SoCs
>  
>    interrupts:
>      minItems: 1
> @@ -181,7 +182,9 @@ allOf:
>          properties:
>            compatible:
>              contains:
> -              const: sifive,fu540-c000-gem
> +              enum:
> +                - sifive,fu540-c000-gem
> +                - sifive,fu740-c000-gem
>      then:
>        properties:
>          reg:
> 
> -- 
> 2.43.0
> 

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Re: [PATCH 1/5] dt-bindings: net: macb: Add SiFive FU740-C000 support

[Max Hsu]

On Fri, Feb 20, 2026 at 09:29:28 +0000, Conor Dooley wrote:
> I don't think this is right, since it is identical to the one on the
> fu540 (as evidenced by how it has worked until now and the contents of
> your driver change). I think you should add the fu740 with a fallback to
> the fu540, like the devices from Microchip that fall back to the
> microchip,sama7g5-gem. The rest of the changes to the driver and binding
> can then be dropped as they'll be redundant.

Thanks for the feedback, Conor!
I'm taking your suggestions. and will prepare v2.

Thanks,
Max

On Fri, Feb 20, 2026 at 5:29 PM Conor Dooley <conor@kernel.org> wrote:
>
> On Fri, Feb 20, 2026 at 04:27:05PM +0800, Max Hsu wrote:
> > Add the SiFive FU740-C000 ethernet controller compatible string to the
> > Cadence MACB binding documentation.
> >
> > The FU740 ethernet controller uses the same GEMGXL management block as
> > the FU540, which is tightly coupled with the Cadence MACB IP. This
> > follows the SiFive IP versioning scheme which requires SoC-specific
> > compatible strings for proper hardware identification.
>
> Your rationale for this change is misguided, as this is not a SiFive IP,
> so that document does not apply. On the other hand, the general rules
> for devicetrees require this so this just means a change in the
> rationale provided.
>
> >
> > Signed-off-by: Max Hsu <max.hsu@sifive.com>
> > ---
> >  Documentation/devicetree/bindings/net/cdns,macb.yaml | 7 +++++--
> >  1 file changed, 5 insertions(+), 2 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml
> > index cb14c35ba996..b46dde1da170 100644
> > --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml
> > +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml
> > @@ -63,6 +63,7 @@ properties:
> >            - mobileye,eyeq5-gem        # Mobileye EyeQ5 SoCs
> >            - raspberrypi,rp1-gem       # Raspberry Pi RP1 gigabit ethernet interface
> >            - sifive,fu540-c000-gem     # SiFive FU540-C000 SoC
> > +          - sifive,fu740-c000-gem     # SiFive FU740-C000 SoC
>
> I don't think this is right, since it is identical to the one on the
> fu540 (as evidenced by how it has worked until now and the contents of
> your driver change). I think you should add the fu740 with a fallback to
> the fu540, like the devices from Microchip that fall back to the
> microchip,sama7g5-gem. The rest of the changes to the driver and binding
> can then be dropped as they'll be redundant.
>
> Thanks,
> Conor.
>
> pw-bot: changes-requested
>
> >
> >        - items:
> >            - enum:
> > @@ -74,7 +75,7 @@ properties:
> >      minItems: 1
> >      items:
> >        - description: Basic register set
> > -      - description: GEMGXL Management block registers on SiFive FU540-C000 SoC
> > +      - description: GEMGXL Management block registers on SiFive FU540/FU740 SoCs
> >
> >    interrupts:
> >      minItems: 1
> > @@ -181,7 +182,9 @@ allOf:
> >          properties:
> >            compatible:
> >              contains:
> > -              const: sifive,fu540-c000-gem
> > +              enum:
> > +                - sifive,fu540-c000-gem
> > +                - sifive,fu740-c000-gem
> >      then:
> >        properties:
> >          reg:
> >
> > --
> > 2.43.0
> >

[PATCH 2/5] dt-bindings: interrupt-controller: Add SiFive FU740-C000 PLIC

[Max Hsu]

Add the SiFive FU740-C000 PLIC compatible string to the binding
documentation.

This follows the SiFive IP versioning scheme which requires SoC-specific
compatible strings for proper hardware identification, even when the IP
blocks are functionally identical.

Signed-off-by: Max Hsu <max.hsu@sifive.com>
---
 .../devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml      | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
index e0267223887e..351d26ab1956 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
@@ -63,6 +63,7 @@ properties:
               - eswin,eic7700-plic
               - microchip,pic64gx-plic
               - sifive,fu540-c000-plic
+              - sifive,fu740-c000-plic
               - spacemit,k1-plic
               - starfive,jh7100-plic
               - starfive,jh7110-plic

-- 
2.43.0

Re: [PATCH 2/5] dt-bindings: interrupt-controller: Add SiFive FU740-C000 PLIC

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 1403 bytes --]

On Fri, Feb 20, 2026 at 04:27:06PM +0800, Max Hsu wrote:
> Add the SiFive FU740-C000 PLIC compatible string to the binding
> documentation.
> 
> This follows the SiFive IP versioning scheme which requires SoC-specific
> compatible strings for proper hardware identification, even when the IP
> blocks are functionally identical.

So do the general rules for devicetree bindings, that's not something
SiFive specific FWIW.
Acked-by: Conor Dooley <conor.dooley@microchip.com>

> 
> Signed-off-by: Max Hsu <max.hsu@sifive.com>
> ---
>  .../devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml      | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> index e0267223887e..351d26ab1956 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> @@ -63,6 +63,7 @@ properties:
>                - eswin,eic7700-plic
>                - microchip,pic64gx-plic
>                - sifive,fu540-c000-plic
> +              - sifive,fu740-c000-plic
>                - spacemit,k1-plic
>                - starfive,jh7100-plic
>                - starfive,jh7110-plic
> 
> -- 
> 2.43.0
> 

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Re: [PATCH 2/5] dt-bindings: interrupt-controller: Add SiFive FU740-C000 PLIC

[Max Hsu]

On Fri, Feb 20, 2026 at 09:23:18 +0000, Conor Dooley wrote:
> So do the general rules for devicetree bindings, that's not something
> SiFive specific FWIW.
> Acked-by: Conor Dooley <conor.dooley@microchip.com>

Thanks for the review and the ack, Conor.

I'll update the commit message in v2 to reference the general device
tree conventions.

Thanks,
Max Hsu

On Fri, Feb 20, 2026 at 5:23 PM Conor Dooley <conor@kernel.org> wrote:
>
> On Fri, Feb 20, 2026 at 04:27:06PM +0800, Max Hsu wrote:
> > Add the SiFive FU740-C000 PLIC compatible string to the binding
> > documentation.
> >
> > This follows the SiFive IP versioning scheme which requires SoC-specific
> > compatible strings for proper hardware identification, even when the IP
> > blocks are functionally identical.
>
> So do the general rules for devicetree bindings, that's not something
> SiFive specific FWIW.
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
>
> >
> > Signed-off-by: Max Hsu <max.hsu@sifive.com>
> > ---
> >  .../devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml      | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> > index e0267223887e..351d26ab1956 100644
> > --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> > +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> > @@ -63,6 +63,7 @@ properties:
> >                - eswin,eic7700-plic
> >                - microchip,pic64gx-plic
> >                - sifive,fu540-c000-plic
> > +              - sifive,fu740-c000-plic
> >                - spacemit,k1-plic
> >                - starfive,jh7100-plic
> >                - starfive,jh7110-plic
> >
> > --
> > 2.43.0
> >

Re: [PATCH 2/5] dt-bindings: interrupt-controller: Add SiFive FU740-C000 PLIC

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 647 bytes --]

On Sat, Feb 21, 2026 at 02:49:19AM +0800, Max Hsu wrote:
> On Fri, Feb 20, 2026 at 09:23:18 +0000, Conor Dooley wrote:
> > So do the general rules for devicetree bindings, that's not something
> > SiFive specific FWIW.
> > Acked-by: Conor Dooley <conor.dooley@microchip.com>
> 
> Thanks for the review and the ack, Conor.
> 
> I'll update the commit message in v2 to reference the general device
> tree conventions.

It's fine as-is, was just pointing out that this is a general guideline.
The SiFive document is mostly about the naming of the fallback
compatibles etc that represent the IP core, rather than the soc-specific
part.

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[PATCH 3/5] net: macb: Add support for SiFive FU740-C000

[Max Hsu]

Add a distinct configuration for the SiFive FU740-C000 ethernet
controller to comply with the SiFive IP versioning guidelines.

The FU740 ethernet controller uses the same management IP block as
the FU540, which is tightly coupled with the Cadence MACB IP and
manages boundary signals. To avoid code duplication while maintaining
distinct SoC identification, this patch:

- Renames sifive_fu540_macb_mgmt to sifive_macb_mgmt to reflect
  that it's shared between FU540 and FU740
- Adds a fu740_c000_config structure that reuses the FU540
  initialization functions
- Follows the established pattern in this driver where multiple
  SoC configs share the same init functions

Signed-off-by: Max Hsu <max.hsu@sifive.com>
---
 drivers/net/ethernet/cadence/macb_main.c | 17 ++++++++++++++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
index 43cd013bb70e..10d049391a73 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -39,8 +39,8 @@
 #include <net/pkt_sched.h>
 #include "macb.h"
 
-/* This structure is only used for MACB on SiFive FU540 devices */
-struct sifive_fu540_macb_mgmt {
+/* This structure is used for MACB on SiFive FU540/FU740 devices */
+struct sifive_macb_mgmt {
 	void __iomem *reg;
 	unsigned long rate;
 	struct clk_hw hw;
@@ -4650,7 +4650,7 @@ static const struct macb_usrio_config macb_default_usrio = {
 /* max number of receive buffers */
 #define AT91ETHER_MAX_RX_DESCR	9
 
-static struct sifive_fu540_macb_mgmt *mgmt;
+static struct sifive_macb_mgmt *mgmt;
 
 static int at91ether_alloc_coherent(struct macb *lp)
 {
@@ -5236,6 +5236,16 @@ static const struct macb_config fu540_c000_config = {
 	.usrio = &macb_default_usrio,
 };
 
+static const struct macb_config fu740_c000_config = {
+	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO |
+		MACB_CAPS_GEM_HAS_PTP,
+	.dma_burst_length = 16,
+	.clk_init = fu540_c000_clk_init,
+	.init = fu540_c000_init,
+	.jumbo_max_len = 10240,
+	.usrio = &macb_default_usrio,
+};
+
 static const struct macb_config at91sam9260_config = {
 	.caps = MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII,
 	.clk_init = macb_clk_init,
@@ -5411,6 +5421,7 @@ static const struct of_device_id macb_dt_ids[] = {
 	{ .compatible = "cdns,zynqmp-gem", .data = &zynqmp_config}, /* deprecated */
 	{ .compatible = "cdns,zynq-gem", .data = &zynq_config }, /* deprecated */
 	{ .compatible = "sifive,fu540-c000-gem", .data = &fu540_c000_config },
+	{ .compatible = "sifive,fu740-c000-gem", .data = &fu740_c000_config },
 	{ .compatible = "microchip,mpfs-macb", .data = &mpfs_config },
 	{ .compatible = "microchip,sama7g5-gem", .data = &sama7g5_gem_config },
 	{ .compatible = "microchip,sama7g5-emac", .data = &sama7g5_emac_config },

-- 
2.43.0

Re: [PATCH 3/5] net: macb: Add support for SiFive FU740-C000

[Andrew Lunn]

On Fri, Feb 20, 2026 at 04:27:07PM +0800, Max Hsu wrote:
> Add a distinct configuration for the SiFive FU740-C000 ethernet
> controller to comply with the SiFive IP versioning guidelines.

We are in the merge window at the moment, so net-next is closed.

As requested, please reword the commit messages to replace the SiFive
guidelines with the generic DT guidelines. And repost when net-next
reopens.

https://www.kernel.org/doc/html/latest/process/maintainer-netdev.html

The Subject line also needs to indicate which tree this is for.

    Andrew

---
pw-bot: cr

Re: [PATCH 3/5] net: macb: Add support for SiFive FU740-C000

[Max Hsu]

Thanks for the review, Andrew!

Based on Conor's feedback on patch 1, I'll be dropping this patch entirely
in v2. Instead, I'll use a fallback compatible string pattern
("sifive,fu740-c000-gem", "sifive,fu540-c000-gem") in the device tree,
which makes this driver change redundant.

Since there will be no net subsystem changes in v2, the series will go
through the devicetree and RISC-V trees instead.

Thanks,
Max


On Fri, Feb 20, 2026 at 9:15 PM Andrew Lunn <andrew@lunn.ch> wrote:
>
> On Fri, Feb 20, 2026 at 04:27:07PM +0800, Max Hsu wrote:
> > Add a distinct configuration for the SiFive FU740-C000 ethernet
> > controller to comply with the SiFive IP versioning guidelines.
>
> We are in the merge window at the moment, so net-next is closed.
>
> As requested, please reword the commit messages to replace the SiFive
> guidelines with the generic DT guidelines. And repost when net-next
> reopens.
>
> https://www.kernel.org/doc/html/latest/process/maintainer-netdev.html
>
> The Subject line also needs to indicate which tree this is for.
>
>     Andrew
>
> ---
> pw-bot: cr
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH 3/5] net: macb: Add support for SiFive FU740-C000

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 749 bytes --]

On Sat, Feb 21, 2026 at 02:35:03AM +0800, Max Hsu wrote:
> Thanks for the review, Andrew!
> 
> Based on Conor's feedback on patch 1, I'll be dropping this patch entirely
> in v2. Instead, I'll use a fallback compatible string pattern
> ("sifive,fu740-c000-gem", "sifive,fu540-c000-gem") in the device tree,
> which makes this driver change redundant.
> 
> Since there will be no net subsystem changes in v2, the series will go
> through the devicetree and RISC-V trees instead.

Nope, you still have one patch for net - the dt-binding for the macb
goes via net. Nothing in this series goes via devicetree or RISC-V trees
either.
Generally, bindings go through driver trees and dts patches go through
the soc tree.

Cheers,
Conor.

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[PATCH 4/5] riscv: dts: sifive: fu740: Use correct ethernet compatible string

[Max Hsu]

Update the ethernet node compatible string from "sifive,fu540-c000-gem"
to "sifive,fu740-c000-gem" to comply with the SiFive IP versioning
scheme documented in sifive-blocks-ip-versioning.txt.

The versioning scheme requires SoC-specific compatible strings even when
IP blocks are functionally identical.

Signed-off-by: Max Hsu <max.hsu@sifive.com>
---
 arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
index 6150f3397bff..15e11a03582a 100644
--- a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
+++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
@@ -273,7 +273,7 @@ spi0: spi@10050000 {
 			status = "disabled";
 		};
 		eth0: ethernet@10090000 {
-			compatible = "sifive,fu540-c000-gem";
+			compatible = "sifive,fu740-c000-gem";
 			interrupt-parent = <&plic0>;
 			interrupts = <55>;
 			reg = <0x0 0x10090000 0x0 0x2000>,

-- 
2.43.0

[PATCH 5/5] riscv: dts: sifive: fu740: Use correct PLIC compatible string

[Max Hsu]

Update the PLIC compatible string from "sifive,fu540-c000-plic" to
"sifive,fu740-c000-plic" to comply with the SiFive IP versioning
scheme documented in sifive-blocks-ip-versioning.txt.

The versioning scheme requires SoC-specific compatible strings for
proper hardware identification.

Signed-off-by: Max Hsu <max.hsu@sifive.com>
---
 arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
index 15e11a03582a..a44ccbf4822b 100644
--- a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
+++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
@@ -182,7 +182,7 @@ soc {
 		plic0: interrupt-controller@c000000 {
 			#interrupt-cells = <1>;
 			#address-cells = <0>;
-			compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
+			compatible = "sifive,fu740-c000-plic", "sifive,plic-1.0.0";
 			reg = <0x0 0xc000000 0x0 0x4000000>;
 			riscv,ndev = <69>;
 			interrupt-controller;

-- 
2.43.0