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Mon, 23 Feb 2026 12:43:56 -0800 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , "Alexei Starovoitov" , Daniel Borkmann , "Jesper Dangaard Brouer" , John Fastabend , Richard Cochran , , , , , Gal Pressman , Dragos Tatulea , Cosmin Ratiu , Pavel Begunkov , David Wei Subject: [PATCH net-next 13/15] net/mlx5e: Pass netdev queue config to param calculations Date: Mon, 23 Feb 2026 22:41:53 +0200 Message-ID: <20260223204155.1783580-14-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20260223204155.1783580-1-tariqt@nvidia.com> References: <20260223204155.1783580-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A0FE:EE_|LV9PR12MB9806:EE_ X-MS-Office365-Filtering-Correlation-Id: df7fd115-5075-4e28-7728-08de731c5170 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|376014|7416014|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?zmKtrkmnDkn5lF7iX1BH4GjXann8WztAbFVC8EDlFcocl6iBanbj5O3JPooX?= =?us-ascii?Q?xXr/T8h6t1JGCkFBpC/YbDosOjHao+pLxrQ+aqK0sYPiYCeNXlmb0IZ+mj2O?= =?us-ascii?Q?xC6/TxI4UcOO82ntOVd7RZcuvqB9X9OhAsTv2/WkNs6TGZ0aVfR9iYBlm5i3?= =?us-ascii?Q?gv7P70sTmpfxCLn22HWUqPwRdpbHi0lJXwaUiIM7uoXEr7RFOYEmDwyXm0yh?= =?us-ascii?Q?dbJoFCJvngZe9c4e1Jy0FOWY1HmmLxNV46Pnoc+iVgOfpX0V1xHsPewUA5zN?= =?us-ascii?Q?slolqn0+nt6Eaajw1UKsIXzMFBI3DTUBXi6nQ5mKqMFI+Kfnpl5+/zoL4o4B?= =?us-ascii?Q?+rTpsOxkZACEOgOMArbUi2rZsq6faSfxVR38g2QBuNYmqIPUaGxzWGK12zg8?= =?us-ascii?Q?3ADkGkLFPBzqhsWPiaxCsTexHO85ATwApPgT8UPFZ61H3bd9wiS3LauZ8t/A?= =?us-ascii?Q?+VYUF3+QIEliv++z4IcTDngWiz4omEJRmX0wpCOyC2OS09M+AFFbuQ9v+v7r?= =?us-ascii?Q?+EOzbizFEv6QbZxoKcGTjWkp7z58Zz3ZFvmjJdYARXH/dWA1IvYnTnhuOLj+?= =?us-ascii?Q?amXeHIZOJIDrQk9bPwojZXaL3M3T1VyusDEA7lvcUSZMDkJdZNYE1eFqQMEe?= =?us-ascii?Q?3yFCrhlUrFocSzljkHFQ0Z0IEPShiRNp1JhB5LbSmYW214j6bE2F9BrTgHDR?= =?us-ascii?Q?BLj16koGpIOGTpvqXKRU1aFUwRNN7gRvCUYHSDBiMquTiAkFQPSM49cSNR6Z?= =?us-ascii?Q?geyY1kUDbO+0WVcmbg+rz3IEhuh4FQ3ML4e9vVH2cgPJ5mAVj+unR67xpB/T?= =?us-ascii?Q?gV1HpCB5VDlbn135cmfnLupPjd9O/4Y2R9WUAbETHyKR8dXMkJjyol9yKdFY?= =?us-ascii?Q?8R1mz3OE8FxyXwLKvVA1oQqm2AK7czIP+0I8UkRph6PZQKYJ7TOqNZ+z/det?= =?us-ascii?Q?nqRDhabyBwxTpZQTwHlvYrIUbYdiwulxOKP++8yDGd37wGB3lLoWF45QaqW0?= =?us-ascii?Q?hf+GJyxGizYuLmap5s6QP5ypiQ29JosfN94/0NRxsJsdyqFOPFe00nU3Qeyp?= =?us-ascii?Q?6x0bwI0nNkGXkBidptSp6Tk7Zo/AmHHTCpWYRzO8VpGEHcHzjq9dwgsUvf6Z?= =?us-ascii?Q?3/ZOowAIXlgwAvfBiVrsEZ/bxDMoIi1OApDqPqv/0ogMVd/m7gUXAajFr1LS?= =?us-ascii?Q?rALxWdta/LeaZBPWsTWLpUwSyZKqdhgFPqrmv9bZRstQy5ItE7z1WnimRzXa?= =?us-ascii?Q?ip6cuJZzQc/LP2HobxG2Pc4onIlp8MSMbW1N/eNziN/32/bC5KVHfKiNaDZH?= =?us-ascii?Q?C1NB1Ewx9/+HE+jVQoHBQb56GMvAgnjkaqHbqx/0RqMRqD1xsZnItk7LD3uS?= =?us-ascii?Q?U2od1q+eyTiWLDOBHkYbtO98P5iLOPtuGJW8gdNHaJDpjcjd4ZOqvAPUut6Y?= =?us-ascii?Q?AuKE5ywIHjpUK+efWkuvcYGMVq0gT0d3+j5znccS+i9Cnb2H0nHjecmGMlg9?= =?us-ascii?Q?K+19REipTW9b4D71EqNqo8ohuOvndcaMtDiUT7obkTb1T3qwXW6cTyt1rHWx?= =?us-ascii?Q?VFtCMl7JXLVLdLIBV+XNfglHeKeUT+7F6Dy2AhyHzzIfvXSPiklkCjZoYkVV?= =?us-ascii?Q?juvyx9yr9rt+X7x3cBaVO3MxjJGGlVdPQWs0KWS6y7z1KhSBGU3C03qVDxJa?= =?us-ascii?Q?dISC4Q=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(376014)(7416014)(1800799024);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: l+CyuIQJ8cvBQRreE6gSdoATPkSTg6GNethE+SDuluthEmlvWzVNEx+L2Wds6FH2og35EbvNfzmoMN1cE1sMlJy3+vtBxNR1qy+GDEkHiYe4/9WWcLO6C2iM+dlPM/Yf7EecaWZsIzUj8cnDiDbo5lOLW/wFEUJBdJgzZ8TsT3kOq2/0nTLT1W4/uvJWlJuKIgoMk3byWp2SX4LYTo3T1ADL/OzXewy3I2g2YY1R2qMNGircq8a/bI+T1kQKevR45Oxe20mO42OKQGQkb4onpunamHzBDe16n1dAvCTbfpT2zycVzR/ppc56Q9NuVrfPL13z1gzfphzy31s00vZta3KQ2vlVYTSFwQptgiyWC0tQQL1heqx4IVANTljaSxm6NYRHDgv9ZpdbY7nkE2jaBsFg+pSiuqQ3fa0GUQs9BQxc4Ux0fDkRVtSMY1XPmdi5 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Feb 2026 20:44:19.3925 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: df7fd115-5075-4e28-7728-08de731c5170 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A0FE.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV9PR12MB9806 From: Dragos Tatulea If set, take rx_page_size into consideration when calculating the page shift in Multi Packet WQE mode. The queue config is saved in the mlx5e_rq_opt_param struct which is added to the mlx5e_channel_param struct. Now the configuration can be read from the struct instead of adding it as an argument to all call sites. For consistency, the queue config is assigned in mlx5e_build_channel_param(). The queue configuration is read only from queue management ops as that's the only place where it is currently useful. Furthermore, netdev_queue_config() expects netdev->queue_mgmt_ops to be set which is not always the case (representor netdevs). Signed-off-by: Dragos Tatulea Reviewed-by: Cosmin Ratiu Signed-off-by: Tariq Toukan --- .../ethernet/mellanox/mlx5/core/en/params.c | 14 ++++++++++++-- .../ethernet/mellanox/mlx5/core/en/params.h | 2 ++ .../net/ethernet/mellanox/mlx5/core/en_main.c | 19 ++++++++++++------- 3 files changed, 26 insertions(+), 9 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/params.c b/drivers/net/ethernet/mellanox/mlx5/core/en/params.c index 97f5d1c2adea..304b46ecc8df 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/params.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/params.c @@ -10,6 +10,7 @@ #include #include #include +#include #define MLX5_MPWRQ_MAX_LOG_WQE_SZ 18 #define MLX5_REP_MPWRQ_MAX_LOG_WQE_SZ 17 @@ -24,11 +25,17 @@ static u8 mlx5e_mpwrq_min_page_shift(struct mlx5_core_dev *mdev) u8 mlx5e_mpwrq_page_shift(struct mlx5_core_dev *mdev, struct mlx5e_rq_opt_param *rqo) { + struct netdev_queue_config *qcfg = rqo ? rqo->qcfg : NULL; struct mlx5e_xsk_param *xsk = mlx5e_rqo_xsk_param(rqo); u8 min_page_shift = mlx5e_mpwrq_min_page_shift(mdev); u8 req_page_shift; - req_page_shift = xsk ? order_base_2(xsk->chunk_size) : PAGE_SHIFT; + if (xsk) + req_page_shift = order_base_2(xsk->chunk_size); + else if (qcfg && qcfg->rx_page_size) + req_page_shift = order_base_2(qcfg->rx_page_size); + else + req_page_shift = PAGE_SHIFT; /* Regular RQ uses order-0 pages, the NIC must be able to map them. */ if (WARN_ON_ONCE(!xsk && req_page_shift < min_page_shift)) @@ -1283,12 +1290,15 @@ void mlx5e_build_xdpsq_param(struct mlx5_core_dev *mdev, int mlx5e_build_channel_param(struct mlx5_core_dev *mdev, struct mlx5e_params *params, + struct netdev_queue_config *qcfg, struct mlx5e_channel_param *cparam) { u8 icosq_log_wq_sz, async_icosq_log_wq_sz; int err; - err = mlx5e_build_rq_param(mdev, params, NULL, &cparam->rq); + cparam->rq_opt.qcfg = qcfg; + + err = mlx5e_build_rq_param(mdev, params, &cparam->rq_opt, &cparam->rq); if (err) return err; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/params.h b/drivers/net/ethernet/mellanox/mlx5/core/en/params.h index 4bce769d48ed..5b6d528bce9b 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/params.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/params.h @@ -14,6 +14,7 @@ struct mlx5e_xsk_param { struct mlx5e_rq_opt_param { struct mlx5e_xsk_param *xsk; + struct netdev_queue_config *qcfg; }; struct mlx5e_cq_param { @@ -143,6 +144,7 @@ void mlx5e_build_xdpsq_param(struct mlx5_core_dev *mdev, struct mlx5e_sq_param *param); int mlx5e_build_channel_param(struct mlx5_core_dev *mdev, struct mlx5e_params *params, + struct netdev_queue_config *qcfg, struct mlx5e_channel_param *cparam); void mlx5e_build_xsk_channel_param(struct mlx5_core_dev *mdev, diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c index 336e384c143a..59e38e7e067e 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c @@ -2524,8 +2524,10 @@ static int mlx5e_set_tx_maxrate(struct net_device *dev, int index, u32 rate) return err; } -static int mlx5e_open_rxq_rq(struct mlx5e_channel *c, struct mlx5e_params *params, - struct mlx5e_rq_param *rq_param) +static int mlx5e_open_rxq_rq(struct mlx5e_channel *c, + struct mlx5e_params *params, + struct mlx5e_rq_param *rq_param, + struct mlx5e_rq_opt_param *rqo) { u16 q_counter = c->priv->q_counter[c->sd_ix]; int err; @@ -2534,7 +2536,7 @@ static int mlx5e_open_rxq_rq(struct mlx5e_channel *c, struct mlx5e_params *param if (err) return err; - return mlx5e_open_rq(params, rq_param, NULL, cpu_to_node(c->cpu), + return mlx5e_open_rq(params, rq_param, rqo, cpu_to_node(c->cpu), q_counter, &c->rq); } @@ -2638,7 +2640,7 @@ static int mlx5e_open_queues(struct mlx5e_channel *c, if (err) goto err_close_icosq; - err = mlx5e_open_rxq_rq(c, params, &cparam->rq); + err = mlx5e_open_rxq_rq(c, params, &cparam->rq, &cparam->rq_opt); if (err) goto err_close_sqs; @@ -2783,6 +2785,7 @@ static void mlx5e_channel_pick_doorbell(struct mlx5e_channel *c) static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix, struct mlx5e_params *params, + struct netdev_queue_config *qcfg, struct xsk_buff_pool *xsk_pool, struct mlx5e_channel **cp) { @@ -2816,7 +2819,7 @@ static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix, goto err_free; } - err = mlx5e_build_channel_param(mdev, params, cparam); + err = mlx5e_build_channel_param(mdev, params, qcfg, cparam); if (err) goto err_free; @@ -2941,7 +2944,8 @@ int mlx5e_open_channels(struct mlx5e_priv *priv, if (chs->params.xdp_prog) xsk_pool = mlx5e_xsk_get_pool(&chs->params, chs->params.xsk, i); - err = mlx5e_open_channel(priv, i, &chs->params, xsk_pool, &chs->c[i]); + err = mlx5e_open_channel(priv, i, &chs->params, NULL, + xsk_pool, &chs->c[i]); if (err) goto err_close_channels; } @@ -5619,7 +5623,8 @@ static int mlx5e_queue_mem_alloc(struct net_device *dev, goto unlock; } - err = mlx5e_open_channel(priv, queue_index, ¶ms, NULL, &new->c); + err = mlx5e_open_channel(priv, queue_index, ¶ms, qcfg, NULL, + &new->c); unlock: mutex_unlock(&priv->state_lock); return err; -- 2.44.0