From: Bjorn Helgaas <helgaas@kernel.org>
To: Vivian Wang <wangruikang@iscas.ac.cn>, Thomas Gleixner <tglx@kernel.org>
Cc: "Mark Bloch" <mbloch@nvidia.com>,
"Madhavan Srinivasan" <maddy@linux.ibm.com>,
"Michael Ellerman" <mpe@ellerman.id.au>,
"Nicholas Piggin" <npiggin@gmail.com>,
"Christophe Leroy (CS GROUP)" <chleroy@kernel.org>,
"Alex Deucher" <alexander.deucher@amd.com>,
"Christian König" <christian.koenig@amd.com>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Andrew Lunn" <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
"Eric Dumazet" <edumazet@google.com>,
"Jakub Kicinski" <kuba@kernel.org>,
"Paolo Abeni" <pabeni@redhat.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Jaroslav Kysela" <perex@perex.cz>,
"Takashi Iwai" <tiwai@suse.com>,
"Brett Creeley" <brett.creeley@amd.com>,
"Han Gao" <gaohan@iscas.ac.cn>,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
netdev@vger.kernel.org, linux-pci@vger.kernel.org,
linux-sound@vger.kernel.org, linux-riscv@lists.infradead.org,
sophgo@lists.linux.dev, "Takashi Iwai" <tiwai@suse.de>,
"Maor Gottlieb" <maorg@nvidia.com>
Subject: Re: [PATCH v4 1/4] PCI/MSI: Conservatively generalize no_64bit_msi into msi_addr_mask
Date: Fri, 27 Feb 2026 10:49:19 -0600 [thread overview]
Message-ID: <20260227164919.GA3897300@bhelgaas> (raw)
In-Reply-To: <c9329ae2-721d-4127-9380-b1ea454bd8f2@iscas.ac.cn>
On Fri, Feb 27, 2026 at 01:25:03PM +0800, Vivian Wang wrote:
> On 2/27/26 02:25, Mark Bloch wrote:
> > On 29/01/2026 3:56, Vivian Wang wrote:
> >> Some PCI devices have PCI_MSI_FLAGS_64BIT in the MSI capability, but
> >> implement less than 64 address bits. This breaks on platforms where such
> >> a device is assigned an MSI address higher than what's reachable.
> >>
> >> Currently, the no_64bit_msi bit is set for these devices, meaning that
> >> only 32-bit MSI addresses are allowed for them. However, on some
> >> platforms the MSI doorbell address is above the 32-bit limit but within
> >> the addressable range of the device.
> >>
> >> As a first step to enabling MSI on those combinations of devices and
> >> platforms, conservatively generalize the single-bit flag no_64bit_msi
> >> into msi_addr_mask. (The name msi_addr_mask is chosen to avoid confusion
> >> with msi_mask.)
> >>
> >> The translation is essentially:
> >>
> >> - no_64bit_msi = 1 -> msi_addr_mask = DMA_BIT_MASK(32)
> >> - no_64bit_msi = 0 -> msi_addr_mask = DMA_BIT_MASK(64)
> >> - if (no_64bit_msi) -> if (msi_addr_mask < DMA_BIT_MASK(64))
> >>
> > Hey Vivian,
> >
> > We are seeing issues while reloading mlx5 on a PPC64 platform.
>
> Mea culpa. There's a fix on the list [1] since last Friday. I'm not sure
> why it hasn't moved yet, but please take a look.
>
> [1]: https://lore.kernel.org/all/20260220070239.1693303-1-nilay@linux.ibm.com/
We needed testing on powerpc and sparc, which has now been done,
thanks to Han Gao (SPARC Enterprise T5220), Nathaniel Roach (SPARC
T5-2), and Venkat Rao Bagalkote (IBM Power System LPAR (pseries)).
It would be ideal to have acks from the powerpc and sparc maintainers,
so I just solicited those.
Thomas merged 386ced19e9a3 ("PCI/MSI: Convert the boolean no_64bit_msi
flag to a DMA address mask"), and could merge the fixes. Otherwise I
can merge via PCI.
Bjorn
next prev parent reply other threads:[~2026-02-27 16:49 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-29 1:56 [PATCH v4 0/4] PCI/MSI: Generalize no_64bit_msi into msi_addr_mask Vivian Wang
2026-01-29 1:56 ` [PATCH v4 1/4] PCI/MSI: Conservatively generalize " Vivian Wang
2026-02-26 18:25 ` Mark Bloch
2026-02-27 5:25 ` Vivian Wang
2026-02-27 8:16 ` Mark Bloch
2026-02-27 16:49 ` Bjorn Helgaas [this message]
2026-01-29 1:56 ` [PATCH v4 2/4] PCI/MSI: Check msi_addr_mask in msi_verify_entries() Vivian Wang
2026-01-29 1:56 ` [PATCH v4 3/4] drm/radeon: Raise msi_addr_mask to dma_bits Vivian Wang
2026-01-29 8:08 ` Christian König
2026-01-29 1:56 ` [PATCH v4 4/4] ALSA: hda/intel: " Vivian Wang
2026-01-29 21:51 ` [PATCH v4 0/4] PCI/MSI: Generalize no_64bit_msi into msi_addr_mask Thomas Gleixner
2026-02-20 4:10 ` patchwork-bot+linux-riscv
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260227164919.GA3897300@bhelgaas \
--to=helgaas@kernel.org \
--cc=airlied@gmail.com \
--cc=alexander.deucher@amd.com \
--cc=amd-gfx@lists.freedesktop.org \
--cc=andrew+netdev@lunn.ch \
--cc=bhelgaas@google.com \
--cc=brett.creeley@amd.com \
--cc=chleroy@kernel.org \
--cc=christian.koenig@amd.com \
--cc=davem@davemloft.net \
--cc=dri-devel@lists.freedesktop.org \
--cc=edumazet@google.com \
--cc=gaohan@iscas.ac.cn \
--cc=kuba@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=linux-sound@vger.kernel.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=maddy@linux.ibm.com \
--cc=maorg@nvidia.com \
--cc=mbloch@nvidia.com \
--cc=mpe@ellerman.id.au \
--cc=netdev@vger.kernel.org \
--cc=npiggin@gmail.com \
--cc=pabeni@redhat.com \
--cc=perex@perex.cz \
--cc=simona@ffwll.ch \
--cc=sophgo@lists.linux.dev \
--cc=tglx@kernel.org \
--cc=tiwai@suse.com \
--cc=tiwai@suse.de \
--cc=wangruikang@iscas.ac.cn \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox