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Thu, 5 Mar 2026 06:27:00 -0800 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Mark Bloch , "Alexei Starovoitov" , Daniel Borkmann , "Jesper Dangaard Brouer" , John Fastabend , , , , , Gal Pressman , Dragos Tatulea , Moshe Shemesh , Carolina Jubran Subject: [PATCH net 2/5] net/mlx5: Fix peer miss rules host disabled checks Date: Thu, 5 Mar 2026 16:26:31 +0200 Message-ID: <20260305142634.1813208-3-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20260305142634.1813208-1-tariqt@nvidia.com> References: <20260305142634.1813208-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF0000468C:EE_|CYXPR12MB9387:EE_ X-MS-Office365-Filtering-Correlation-Id: 8c68ff84-350f-42f3-e67e-08de7ac34f81 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|82310400026|1800799024|36860700016; X-Microsoft-Antispam-Message-Info: mYL4fDbyRP3l4Ej5BCx/pa+bcPgqUjdvRmo6nauMFLrFXXluv3x5XxRF/gY46EZGDoTA1CIAklYeutd8EwDE1kA6o21aptOWTmFxiSSOstok0OU3CsO1VuF6sJTxe6Q3S62/9OqWIxwHNykae9nF+xbCMdEBeM0CJZ/YKkR7Nlg/fTeFH6I1BULnehadiDlkk1bxiHI+2ayIg72WE2/cjOuR6g/RG41bnExVmlsjJ5+M2AMZ0OprQLUcXtJqZKyk4RCeXengBdjnm+iTP0CilfhVq7/HnkcTLVLDXxY3eV1/4TOVsGZzXZtnRVBGEDNQCdWedr9COpkfBhQ81qQQri1pzmKOo8z3vfwbsmLAqc6EwR0zSfDgj6OzAk1Pdf/MsYyPunzIPY4iGTtC/EIqeCoc5J4UTc6VIefJD/i0+FiAFC/6Pn8k1Qtox90Mq+Zo6H05cIOo/s1roEi6UNXHb7y9+QTiEwWf8WC804TPrLyypQcmX86Hc4jt/vPvbw7vdAHbCnFNaWFAgt5Y2U/sftjALqN5G5jnZkNgWxJ3bp7IxouK9Kegc2MxIu7u4NCWoDgYnw+jen9E8uu6TQCywz6+gbz9q72npL+4ci8lAAnyVH4BQf2p5nMNHHpN7EuuE+d1NvslnkO1GcJ79Bqg9jqS/wfLV5yfgHEODD14ep7nw2n2xP73n/N7lwsR/QHQs7AGYGi+FIWp6KCfhLkvhi6Nq/QKcZGjL1FSujg50q+NYlhCAon+lLKuCMUwtTiCs6PCrqH2yyvJJe/PrY/pEA== X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(7416014)(82310400026)(1800799024)(36860700016);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 9JpuhDBrxC3ne0AOT2aiqQDtd/PWdfrECzpW8vT7ohjfp+mYrTUdqSX+HUbizQzrv03Mz/L4jgBtnuKi+d6IszfgfVz+l3ErXvFODP/R/g53PRZjrDV0MMy6rA1BpFlZM43oMQh3VKlXUtezT3wSOxr0ZSaz0l4fAiLRIuXrftj/D/Dei6xWjt25+2HfKAd/+0HmVCEfE/QPSY7ebdDe0e516PTngkKhIXNlETRzYmklGw+WUkDHANIxSiIdWLyNEzg5H+3NlIpsqnG8SQ9HZwxOvR9IBOLWjCXpdaxwg5DvOxdgDGtqUyIX4m6CHRsIXVHRBn2VPvFimcnGJD+FRxMIbsR8U8/gNczw/LJo2IRyL6g8Qp4lBg5ci1EjfdH4XVzCvWp6aavYxA8aGbLMBbUeoiNh4PMQw/fXzp7C6l/JzqciMpHzHMj1d8sGPQkW X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Mar 2026 14:27:20.2456 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8c68ff84-350f-42f3-e67e-08de7ac34f81 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF0000468C.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYXPR12MB9387 From: Carolina Jubran The check on mlx5_esw_host_functions_enabled(esw->dev) for adding VF peer miss rules is incorrect. These rules match traffic from peer's VFs, so the local device's host function status is irrelevant. Remove this check to ensure peer VF traffic is properly handled regardless of local host configuration. Also fix the PF peer miss rule deletion to be symmetric with the add path, so only attempt to delete the rule if it was actually created. Fixes: 520369ef43a8 ("net/mlx5: Support disabling host PFs") Signed-off-by: Carolina Jubran Signed-off-by: Tariq Toukan --- .../mellanox/mlx5/core/eswitch_offloads.c | 27 +++++++++---------- 1 file changed, 12 insertions(+), 15 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c index 1366f6e489bd..2f55ea3f8bf8 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c @@ -1241,21 +1241,17 @@ static int esw_add_fdb_peer_miss_rules(struct mlx5_eswitch *esw, flows[peer_vport->index] = flow; } - if (mlx5_esw_host_functions_enabled(esw->dev)) { - mlx5_esw_for_each_vf_vport(peer_esw, i, peer_vport, - mlx5_core_max_vfs(peer_dev)) { - esw_set_peer_miss_rule_source_port(esw, peer_esw, - spec, - peer_vport->vport); - - flow = mlx5_add_flow_rules(mlx5_eswitch_get_slow_fdb(esw), - spec, &flow_act, &dest, 1); - if (IS_ERR(flow)) { - err = PTR_ERR(flow); - goto add_vf_flow_err; - } - flows[peer_vport->index] = flow; + mlx5_esw_for_each_vf_vport(peer_esw, i, peer_vport, + mlx5_core_max_vfs(peer_dev)) { + esw_set_peer_miss_rule_source_port(esw, peer_esw, spec, + peer_vport->vport); + flow = mlx5_add_flow_rules(mlx5_eswitch_get_slow_fdb(esw), + spec, &flow_act, &dest, 1); + if (IS_ERR(flow)) { + err = PTR_ERR(flow); + goto add_vf_flow_err; } + flows[peer_vport->index] = flow; } if (mlx5_core_ec_sriov_enabled(peer_dev)) { @@ -1347,7 +1343,8 @@ static void esw_del_fdb_peer_miss_rules(struct mlx5_eswitch *esw, mlx5_del_flow_rules(flows[peer_vport->index]); } - if (mlx5_core_is_ecpf_esw_manager(peer_dev)) { + if (mlx5_core_is_ecpf_esw_manager(peer_dev) && + mlx5_esw_host_functions_enabled(peer_dev)) { peer_vport = mlx5_eswitch_get_vport(peer_esw, MLX5_VPORT_PF); mlx5_del_flow_rules(flows[peer_vport->index]); } -- 2.44.0