From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A87E73D3CEC; Tue, 10 Mar 2026 17:19:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773163176; cv=none; b=sYVAXg4QKTP2xa95cyiE1A1MfkUFPZQ96Ie2r1MyqxBdMzaKBqCj+lVjH97vYlbK5R2lxlCakevRFy0nM+XCc2FPIdcAETZYmSGT+S61dsKRHFxzLhbiZeJDFYovyoMTqKoOYntBlW3FU6ct5Q/f93HyFtUBRY1P/ziN6my7wn0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773163176; c=relaxed/simple; bh=4Jefrf9Fj15twe5ClL92NgaOwnYD/+HOvjurslPqioo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=D+0aSc7DHeDV1Zv4MSjBjuDDqtmHMiGMVmM7IhqTdHV6wJOcn1BSqchE2YXFpuRdDm23oycSoewyUrMam2yFQUQxr66RDFQphED/dNHM6x6GsgOehXHCoqECw+dmTy6xOeOJ0fLX4T7MAB8cjgGs/kPuizyJus2JnO77Y+pwFik= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=hapoV9Uc; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="hapoV9Uc" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1AD98C2BCB4; Tue, 10 Mar 2026 17:19:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773163176; bh=4Jefrf9Fj15twe5ClL92NgaOwnYD/+HOvjurslPqioo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hapoV9Uci77yy+KzMxuehDevksM7h75V5zqUMWJYQyqBZMMINcYAoGBgX6R85O6BY He5priq/mvJzO57LrbW3lPt6xl65NLDzaButDFp3uOmVTKeuqoaAgU7aTW7mItY3Wl gEECSuRDwiJr94c0SfNwrYwJI3avfoOE/EvtD7r8RmFb899UaVsWQEzuRhu5tEaat1 lEkECSsEWui+P2jq5BZTh6DCPWd9mt6B+glC5GELg74F+KA8au1klN0lN0GHiPtntQ mdmf2YyTyjn0SRklmQKCGQM2OBnhBBOGq0BIoIgIJBYn+0bDMvZNE5bKj6A+nglZKM nGk3slVlFnkAg== From: Conor Dooley To: netdev@vger.kernel.org Cc: conor@kernel.org, Conor Dooley , Valentina.FernandezAlanis@microchip.com, Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Daire McNamara , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Nicolas Ferre , Claudiu Beznea , Richard Cochran , Samuel Holland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Dave Stevenson , Sean Anderson , Vineeth Karumanchi , Abin Joseph , =?UTF-8?q?Th=C3=A9o=20Lebrun?= , Ryan.Wanner@microchip.com Subject: [PATCH net-next v3 09/10] dt-bindings: net: macb: add property indicating timer adjust mode Date: Tue, 10 Mar 2026 17:17:16 +0000 Message-ID: <20260310-aviator-upswing-80e8543a2300@spud> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260310-moneyless-dispense-7bce14b16388@spud> References: <20260310-moneyless-dispense-7bce14b16388@spud> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2043; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=PwUkqjIET53ZYiiF+Rx5ytj1SfxTmti7f7XTTfzPPXc=; b=owGbwMvMwCVWscWwfUFT0iXG02pJDJkbgvReF159pbtLr/n67uzumtDNa3zro+dsFvugeHNSU XbxUf0JHaUsDGJcDLJiiiyJt/tapNb/cdnh3PMWZg4rE8gQBi5OAZjI5bmMDFPNc492vbZdwh+x 8f+OgJtLp/N+FW0wbJT/e6TO+t9R6whGhodH5xoccbyccONvPsurWTvV+r7u2uMfmCN04aGL/Jc PxUwA X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Content-Transfer-Encoding: 8bit From: Conor Dooley The GEM IP has two methods for modifying the ptp timer. The first of these, named "increment mode", relies on software controlling the timer by setting tsu_timer_incr and tsu_timer_incr_sub_nsec and performing once-off adjustments via the tsu_timer_adjust register. This is what the macb driver uses. The second mechanism, "timer adjust mode" uses the gem_tsu_inc_ctrl and gem_tsu_ms signals to control the timer. These modes are not intended to be used in parallel, but both can be possible on the same device and which mode is used cannot be determined from the compatible on all devices, because some users of the GEM IP are SoC FPGAs that permit configuring how the IP is wired up. Add a property to indicate that gem_tsu_inc_ctrl and gem_tsu_ms are wired up for timer adjust mode. Signed-off-by: Conor Dooley --- .../devicetree/bindings/net/cdns,macb.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml index a492357570edd..84c32664ccb0d 100644 --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml @@ -139,6 +139,12 @@ properties: that need to be filled, before the forwarding process is activated. Width of the SRAM is platform dependent, and can be 4, 8 or 16 bytes. + cdns,timer-adjust: + type: boolean + description: + Set when the hardware is operating in timer-adjust mode, where the timer + is controlled by the gem_tsu_inc_ctrl and gem_tsu_ms inputs. + '#address-cells': const: 1 @@ -188,6 +194,15 @@ allOf: properties: reg: maxItems: 1 + - if: + not: + properties: + compatible: + contains: + const: microchip,mpfs-macb + then: + properties: + cdns,timer-adjust: false - if: properties: -- 2.51.0