* [PATCH iwl-next v4 1/2] ethtool: treat RXH_GTP_TEID as intrinsically symmetric
2026-02-26 14:40 [PATCH iwl-next v4 0/2] " Aleksandr Loktionov
@ 2026-02-26 14:40 ` Aleksandr Loktionov
0 siblings, 0 replies; 7+ messages in thread
From: Aleksandr Loktionov @ 2026-02-26 14:40 UTC (permalink / raw)
To: intel-wired-lan, netdev, anthony.l.nguyen, aleksandr.loktionov
A GTP tunnel uses the same TEID value in both directions of a flow;
including TEID in the hash input does not break src/dst symmetry.
ethtool_rxfh_config_is_sym() currently rejects any hash field bitmap
that contains bits outside the four paired L3/L4 fields. This causes
drivers that hash GTP flows on TEID to fail the kernel's preflight
validation in ethtool_check_flow_types(), making it impossible for
those drivers to support symmetric-xor transforms at all.
Strip RXH_GTP_TEID from the bitmap before the paired-field check so
that drivers may honestly report TEID hashing without blocking the
configuration of symmetric transforms.
Signed-off-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
---
net/ethtool/common.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/net/ethtool/common.c b/net/ethtool/common.c
index 5fae329..9a3fd76 100644
--- a/net/ethtool/common.c
+++ b/net/ethtool/common.c
@@ -911,6 +911,9 @@ int ethtool_rxfh_config_is_sym(u64 rxfh)
{
bool sym;
+ /* Strip TEID before checking - it carries no src/dst asymmetry */
+ rxfh &= ~(u64)RXH_GTP_TEID;
+
sym = rxfh == (rxfh & (RXH_IP_SRC | RXH_IP_DST |
RXH_L4_B_0_1 | RXH_L4_B_2_3));
sym &= !!(rxfh & RXH_IP_SRC) == !!(rxfh & RXH_IP_DST);
--
2.52.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH iwl-next v4 0/2] ice: implement symmetric RSS hash configuration
@ 2026-03-12 9:30 Aleksandr Loktionov
2026-03-12 9:31 ` [PATCH iwl-next v4 1/2] ethtool: treat RXH_GTP_TEID as intrinsically symmetric Aleksandr Loktionov
2026-03-12 9:31 ` [PATCH iwl-next v4 2/2] ice: implement symmetric RSS hash configuration Aleksandr Loktionov
0 siblings, 2 replies; 7+ messages in thread
From: Aleksandr Loktionov @ 2026-03-12 9:30 UTC (permalink / raw)
To: intel-wired-lan, netdev, anthony.l.nguyen, aleksandr.loktionov
The ice driver has advertised symmetric RSS support via
supported_input_xfrm since the capability was added, but ice_set_rxfh()
ignored the input_xfrm parameter entirely, so enabling symmetric hashing
had no actual effect.
This series fixes that. Patch 1 extends the ethtool core so that
drivers hashing GTP flows on TEID can report it honestly without
blocking symmetric-xor configuration. Patch 2 wires up the ice driver.
The need for patch 1 surfaced because GTP flow profiles in ice always
include TEID in the hash. ethtool_check_flow_types() calls
get_rxfh_fields() for every hashable flow type before allowing
symmetric-xor; ethtool_rxfh_config_is_sym() rejected any bitmap
containing RXH_GTP_TEID since it has no src/dst counterpart. TEID
is the same value in both tunnel directions, so this rejection is
incorrect: including it does not break symmetry.
Rather than hiding TEID from the reported fields (which would silently
misrepresent hardware behaviour), patch 1 fixes the validator, and
patch 2 reports TEID honestly.
Tested with tools/testing/selftests/drivers/net/hw/rss_input_xfrm.py
on an E810 card running kernel 6.19-rc8.
---
v3 -> v4:
- Drop the ICE_HASH_INVALID fallback in ice_get_rxfh_fields() that
fabricated default L3+L4 hash fields when no hardware RSS config
exists for a flow type; returning zero fields is more honest and
avoids misrepresenting hardware state
- Drop the companion "if (!l3 && !l4)" special case in the
pair-completion block; it was only necessary to cover the synthetic
defaults added by the fallback, which is now gone
- No functional change to ice_set_rxfh() or the ethtool core patch
v2 -> v3:
- Split into 2 patches: ethtool core fix separate from driver change
- Drop the RXH_GTP_TEID stripping workaround from the driver; instead
fix ethtool_rxfh_config_is_sym() to accept TEID as intrinsically
symmetric (patch 1)
- Fix ice_get_rxfh_fields(): the v2 unconditional assignment
"nfc->data = ICE_RSS_ALLOWED_FIELDS" clobbered fields set earlier in
the same function; replaced with pair-completion using |= so only
the missing half of a partial pair is filled in
- Remove ICE_RSS_ALLOWED_FIELDS define (no longer needed)
- Report RXH_GTP_TEID honestly for GTP flow types
v1 -> v2:
- Preserve valid symmetric RSS fields instead of overwriting nfc->data
unconditionally
Aleksandr Loktionov (2):
ethtool: treat RXH_GTP_TEID as intrinsically symmetric
ice: implement symmetric RSS hash configuration
drivers/net/ethernet/intel/ice/ice_ethtool.c | 40 +++++++++++++---
drivers/net/ethernet/intel/ice/ice_lib.c | 7 ++--
drivers/net/ethernet/intel/ice/ice_lib.h | 1 +
net/ethtool/common.c | 3 +++
4 files changed, 40 insertions(+), 11 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH iwl-next v4 1/2] ethtool: treat RXH_GTP_TEID as intrinsically symmetric
2026-03-12 9:30 [PATCH iwl-next v4 0/2] ice: implement symmetric RSS hash configuration Aleksandr Loktionov
@ 2026-03-12 9:31 ` Aleksandr Loktionov
2026-03-12 14:42 ` Jakub Kicinski
2026-03-12 9:31 ` [PATCH iwl-next v4 2/2] ice: implement symmetric RSS hash configuration Aleksandr Loktionov
1 sibling, 1 reply; 7+ messages in thread
From: Aleksandr Loktionov @ 2026-03-12 9:31 UTC (permalink / raw)
To: intel-wired-lan, netdev, anthony.l.nguyen, aleksandr.loktionov
A GTP tunnel uses the same TEID value in both directions of a flow;
including TEID in the hash input does not break src/dst symmetry.
ethtool_rxfh_config_is_sym() currently rejects any hash field bitmap
that contains bits outside the four paired L3/L4 fields. This causes
drivers that hash GTP flows on TEID to fail the kernel's preflight
validation in ethtool_check_flow_types(), making it impossible for
those drivers to support symmetric-xor transforms at all.
Strip RXH_GTP_TEID from the bitmap before the paired-field check so
that drivers may honestly report TEID hashing without blocking the
configuration of symmetric transforms.
Signed-off-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
---
net/ethtool/common.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/net/ethtool/common.c b/net/ethtool/common.c
index 5fae329..9a3fd76 100644
--- a/net/ethtool/common.c
+++ b/net/ethtool/common.c
@@ -911,6 +911,9 @@ int ethtool_rxfh_config_is_sym(u64 rxfh)
{
bool sym;
+ /* Strip TEID before checking - it carries no src/dst asymmetry */
+ rxfh &= ~(u64)RXH_GTP_TEID;
+
sym = rxfh == (rxfh & (RXH_IP_SRC | RXH_IP_DST |
RXH_L4_B_0_1 | RXH_L4_B_2_3));
sym &= !!(rxfh & RXH_IP_SRC) == !!(rxfh & RXH_IP_DST);
--
2.52.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH iwl-next v4 2/2] ice: implement symmetric RSS hash configuration
2026-03-12 9:30 [PATCH iwl-next v4 0/2] ice: implement symmetric RSS hash configuration Aleksandr Loktionov
2026-03-12 9:31 ` [PATCH iwl-next v4 1/2] ethtool: treat RXH_GTP_TEID as intrinsically symmetric Aleksandr Loktionov
@ 2026-03-12 9:31 ` Aleksandr Loktionov
1 sibling, 0 replies; 7+ messages in thread
From: Aleksandr Loktionov @ 2026-03-12 9:31 UTC (permalink / raw)
To: intel-wired-lan, netdev, anthony.l.nguyen, aleksandr.loktionov
The driver advertises symmetric RSS support via supported_input_xfrm
but ice_set_rxfh() always programmed plain Toeplitz regardless of the
requested input_xfrm, making it impossible to actually enable symmetric
hashing.
Fix ice_set_rxfh() to honour rxfh->input_xfrm: program symmetric
Toeplitz (ICE_AQ_VSI_Q_OPT_RSS_HASH_SYM_TPLZ) when RXH_XFRM_SYM_XOR
is requested, revert to plain Toeplitz when the transform is cleared,
and skip the hardware write when the function has not changed.
Make ice_set_rss_vsi_ctx() non-static and export it so ice_set_rxfh()
can reprogram the VSI context directly. Change it to preserve
vsi->rss_hfunc across VSI reinitialisation instead of always resetting
to plain Toeplitz, which would silently undo any previously configured
symmetric hash function.
Fix ice_get_rxfh_fields() to report the hash fields actually programmed
in hardware. When the hardware hashes on only one half of an L3 or L4
pair, complete the pair in the reported bitmap to satisfy the kernel's
symmetry validator. For GTP flow types, report RXH_GTP_TEID honestly;
ethtool_rxfh_config_is_sym() now accepts TEID as an intrinsically
symmetric field (see preceding patch).
Tested with tools/testing/selftests/drivers/net/hw/rss_input_xfrm.py
Signed-off-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
---
drivers/net/ethernet/intel/ice/ice_ethtool.c | 40 ++++++++++++++++----
drivers/net/ethernet/intel/ice/ice_lib.c | 7 ++--
drivers/net/ethernet/intel/ice/ice_lib.h | 1 +
3 files changed, 37 insertions(+), 11 deletions(-)
diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.c b/drivers/net/ethernet/intel/ice/ice_ethtool.c
index c6bc29c..6ccfe36 100644
--- a/drivers/net/ethernet/intel/ice/ice_ethtool.c
+++ b/drivers/net/ethernet/intel/ice/ice_ethtool.c
@@ -3008,14 +3008,17 @@ ice_set_rxfh_fields(struct net_device *netdev,
return 0;
}
+#define ICE_RSS_L3_PAIR (RXH_IP_SRC | RXH_IP_DST)
+#define ICE_RSS_L4_PAIR (RXH_L4_B_0_1 | RXH_L4_B_2_3)
+
static int
ice_get_rxfh_fields(struct net_device *netdev, struct ethtool_rxfh_fields *nfc)
{
struct ice_netdev_priv *np = netdev_priv(netdev);
struct ice_vsi *vsi = np->vsi;
struct ice_pf *pf = vsi->back;
+ u64 l3, l4, hash_flds;
struct device *dev;
- u64 hash_flds;
bool symm;
u32 hdrs;
@@ -3067,6 +3070,13 @@ ice_get_rxfh_fields(struct net_device *netdev, struct ethtool_rxfh_fields *nfc)
hash_flds & ICE_FLOW_HASH_FLD_GTPU_DWN_TEID)
nfc->data |= (u64)RXH_GTP_TEID;
+ l3 = nfc->data & ICE_RSS_L3_PAIR;
+ l4 = nfc->data & ICE_RSS_L4_PAIR;
+ if (l3 && l3 != ICE_RSS_L3_PAIR)
+ nfc->data |= ICE_RSS_L3_PAIR;
+ if (l4 && l4 != ICE_RSS_L4_PAIR)
+ nfc->data |= ICE_RSS_L4_PAIR;
+
return 0;
}
@@ -3667,7 +3677,6 @@ ice_set_rxfh(struct net_device *netdev, struct ethtool_rxfh_param *rxfh,
struct netlink_ext_ack *extack)
{
struct ice_netdev_priv *np = netdev_priv(netdev);
- u8 hfunc = ICE_AQ_VSI_Q_OPT_RSS_HASH_TPLZ;
struct ice_vsi *vsi = np->vsi;
struct ice_pf *pf = vsi->back;
struct device *dev;
@@ -3689,13 +3698,28 @@ ice_set_rxfh(struct net_device *netdev, struct ethtool_rxfh_param *rxfh,
return -EOPNOTSUPP;
}
- /* Update the VSI's hash function */
- if (rxfh->input_xfrm & RXH_XFRM_SYM_XOR)
- hfunc = ICE_AQ_VSI_Q_OPT_RSS_HASH_SYM_TPLZ;
+ /* Handle RSS symmetric hash transformation */
+ if (rxfh->input_xfrm != RXH_XFRM_NO_CHANGE) {
+ u8 new_hfunc;
- err = ice_set_rss_hfunc(vsi, hfunc);
- if (err)
- return err;
+ if (rxfh->input_xfrm == RXH_XFRM_SYM_XOR)
+ new_hfunc = ICE_AQ_VSI_Q_OPT_RSS_HASH_SYM_TPLZ;
+ else if (!rxfh->input_xfrm)
+ new_hfunc = ICE_AQ_VSI_Q_OPT_RSS_HASH_TPLZ;
+ else
+ return -EOPNOTSUPP;
+
+ if (new_hfunc != vsi->rss_hfunc) {
+ err = ice_set_rss_hfunc(vsi, new_hfunc);
+ if (err) {
+ netdev_err(netdev, "Failed to set RSS hash function\n");
+ return err;
+ }
+ netdev_dbg(netdev, "RSS hash function: %sToeplitz\n",
+ new_hfunc == ICE_AQ_VSI_Q_OPT_RSS_HASH_SYM_TPLZ ?
+ "Symmetric " : "");
+ }
+ }
if (rxfh->key) {
if (!vsi->rss_hkey_user) {
diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c
index d921269..5b1934b 100644
--- a/drivers/net/ethernet/intel/ice/ice_lib.c
+++ b/drivers/net/ethernet/intel/ice/ice_lib.c
@@ -1155,7 +1155,7 @@ static void ice_set_fd_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
* @ctxt: the VSI context being set
* @vsi: the VSI being configured
*/
-static void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
+void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
{
u8 lut_type, hash_type;
struct device *dev;
@@ -1181,8 +1181,9 @@ static void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
return;
}
- hash_type = ICE_AQ_VSI_Q_OPT_RSS_HASH_TPLZ;
- vsi->rss_hfunc = hash_type;
+ if (!vsi->rss_hfunc)
+ vsi->rss_hfunc = ICE_AQ_VSI_Q_OPT_RSS_HASH_TPLZ;
+ hash_type = vsi->rss_hfunc;
ctxt->info.q_opt_rss =
FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_LUT_M, lut_type) |
diff --git a/drivers/net/ethernet/intel/ice/ice_lib.h b/drivers/net/ethernet/intel/ice/ice_lib.h
index 49454d98..29ba335 100644
--- a/drivers/net/ethernet/intel/ice/ice_lib.h
+++ b/drivers/net/ethernet/intel/ice/ice_lib.h
@@ -46,6 +46,7 @@ void ice_vsi_delete(struct ice_vsi *vsi);
int ice_vsi_cfg_tc(struct ice_vsi *vsi, u8 ena_tc);
int ice_vsi_cfg_rss_lut_key(struct ice_vsi *vsi);
+void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi);
void ice_vsi_cfg_netdev_tc(struct ice_vsi *vsi, u8 ena_tc);
--
2.52.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH iwl-next v4 1/2] ethtool: treat RXH_GTP_TEID as intrinsically symmetric
2026-03-12 9:31 ` [PATCH iwl-next v4 1/2] ethtool: treat RXH_GTP_TEID as intrinsically symmetric Aleksandr Loktionov
@ 2026-03-12 14:42 ` Jakub Kicinski
2026-03-13 11:28 ` Loktionov, Aleksandr
0 siblings, 1 reply; 7+ messages in thread
From: Jakub Kicinski @ 2026-03-12 14:42 UTC (permalink / raw)
To: Aleksandr Loktionov; +Cc: intel-wired-lan, netdev, anthony.l.nguyen
On Thu, 12 Mar 2026 10:31:00 +0100 Aleksandr Loktionov wrote:
> + /* Strip TEID before checking - it carries no src/dst asymmetry */
> + rxfh &= ~(u64)RXH_GTP_TEID;
No need for the u64 cast.
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH iwl-next v4 1/2] ethtool: treat RXH_GTP_TEID as intrinsically symmetric
2026-03-12 14:42 ` Jakub Kicinski
@ 2026-03-13 11:28 ` Loktionov, Aleksandr
2026-03-14 15:13 ` Jakub Kicinski
0 siblings, 1 reply; 7+ messages in thread
From: Loktionov, Aleksandr @ 2026-03-13 11:28 UTC (permalink / raw)
To: Jakub Kicinski
Cc: intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org,
Nguyen, Anthony L
> -----Original Message-----
> From: Jakub Kicinski <kuba@kernel.org>
> Sent: Thursday, March 12, 2026 3:42 PM
> To: Loktionov, Aleksandr <aleksandr.loktionov@intel.com>
> Cc: intel-wired-lan@lists.osuosl.org; netdev@vger.kernel.org; Nguyen,
> Anthony L <anthony.l.nguyen@intel.com>
> Subject: Re: [PATCH iwl-next v4 1/2] ethtool: treat RXH_GTP_TEID as
> intrinsically symmetric
>
> On Thu, 12 Mar 2026 10:31:00 +0100 Aleksandr Loktionov wrote:
> > + /* Strip TEID before checking - it carries no src/dst asymmetry
> */
> > + rxfh &= ~(u64)RXH_GTP_TEID;
>
> No need for the u64 cast.
But without (u64) it will work only while it defined as implicit int
#define RXH_GTP_TEID (1 << 8)
When it will be defined as BIT(8) or unsigned int it will break.
What you'd recommend preventing such issues in the future?
Thank you
Alex
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH iwl-next v4 1/2] ethtool: treat RXH_GTP_TEID as intrinsically symmetric
2026-03-13 11:28 ` Loktionov, Aleksandr
@ 2026-03-14 15:13 ` Jakub Kicinski
0 siblings, 0 replies; 7+ messages in thread
From: Jakub Kicinski @ 2026-03-14 15:13 UTC (permalink / raw)
To: Loktionov, Aleksandr
Cc: intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org,
Nguyen, Anthony L
On Fri, 13 Mar 2026 11:28:29 +0000 Loktionov, Aleksandr wrote:
> > -----Original Message-----
> > From: Jakub Kicinski <kuba@kernel.org>
> > Sent: Thursday, March 12, 2026 3:42 PM
> > To: Loktionov, Aleksandr <aleksandr.loktionov@intel.com>
> > Cc: intel-wired-lan@lists.osuosl.org; netdev@vger.kernel.org; Nguyen,
> > Anthony L <anthony.l.nguyen@intel.com>
> > Subject: Re: [PATCH iwl-next v4 1/2] ethtool: treat RXH_GTP_TEID as
> > intrinsically symmetric
> >
> > On Thu, 12 Mar 2026 10:31:00 +0100 Aleksandr Loktionov wrote:
> > > + /* Strip TEID before checking - it carries no src/dst asymmetry
> > */
> > > + rxfh &= ~(u64)RXH_GTP_TEID;
> >
> > No need for the u64 cast.
>
> But without (u64) it will work only while it defined as implicit int
> #define RXH_GTP_TEID (1 << 8)
>
> When it will be defined as BIT(8) or unsigned int it will break.
> What you'd recommend preventing such issues in the future?
We will convert the 1 to 1ULL once we actually allocate the previous 31
bits? The type is only u64 because it may come from a UINT but the upper
bits must be zeros right now.
^ permalink raw reply [flat|nested] 7+ messages in thread
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