From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AAAFB346E56; Wed, 18 Mar 2026 09:11:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.13 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773825070; cv=none; b=L+AActrXuqugbzAZwLQ0W+f/5gGCBX+Pv6/abPaANlZONJxu5JOQhZk/SKJnSoR/7HNclg6zu3sSvugDz4Me3+TX9E0ys3VJhYCGtRXqI9R9+Bk+JFDQ6x7f3TNSN6IdrhMz2PBw3b4v3T6wJw+pi4BmuHUmcCfRhp1ODO0+ZXs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773825070; c=relaxed/simple; bh=Izbqb6M5jnyKGkCx6C0FAG3R4OV2Dm01nNdm0f5hBzY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=spGHiL5EIGFmRA0anrth6xXbCKtyRQUcM17TIZkszE/YDpSLZ0LczVb5qrsB4vfoBkGrYUXFPRlWJQrA5Y9PCLZVYn3cfNOG1RkJunxShkNvzIiQdz8S+IgAE/Gq5PEAUhHTboILakSAud0TjqItDnblSWJsFmQqh9/fPdvRq0I= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=bkA9HGp5; arc=none smtp.client-ip=192.198.163.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="bkA9HGp5" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1773825068; x=1805361068; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Izbqb6M5jnyKGkCx6C0FAG3R4OV2Dm01nNdm0f5hBzY=; b=bkA9HGp5RiHm4hsE1uZ5ccNm302lqXfVRJ2tXYFaPd9qli5TfLxUEISp aj3TNn5TZmxZ1Z+ytEEoYvWqgUFTsO31/J8q7OoT/b/my4A9u/XJnO2Fw 7fcTK+9tVi8alHQmKzKXrpPLm64t0WwSiDnX7/ONASrEDg75veFhahguu U85FynHjmQqb0WBBNebxmOkA0/EDk9DsVbeT5hKiGlfE2jNnBRdWLmP9g 65HsXhG86yKAsPSNqeeVGNgSm894t+LV32atE+6vx4pEINUmNQFZF4k+l dPKxOmrxs9UoWpfzSLyYzDQ4B4AMF30EKChAd2tRiMl4rtcQI0DEz8PS6 A==; X-CSE-ConnectionGUID: ww/MuJtjSdmtZJPeu5qnxQ== X-CSE-MsgGUID: IDDwTbB3QGGJiXyvA2+rgw== X-IronPort-AV: E=McAfee;i="6800,10657,11732"; a="77484423" X-IronPort-AV: E=Sophos;i="6.23,127,1770624000"; d="scan'208";a="77484423" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Mar 2026 02:11:08 -0700 X-CSE-ConnectionGUID: 35jVebHEQ+Goryw7Dfl7GA== X-CSE-MsgGUID: RqpGm9qCRNClciwUT08+NQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,127,1770624000"; d="scan'208";a="226699965" Received: from gklab-003-001.igk.intel.com ([10.91.173.48]) by orviesa003.jf.intel.com with ESMTP; 18 Mar 2026 02:11:04 -0700 From: Grzegorz Nitka To: netdev@vger.kernel.org Cc: linux-kernel@vger.kernel.org, intel-wired-lan@lists.osuosl.org, poros@redhat.com, richardcochran@gmail.com, andrew+netdev@lunn.ch, przemyslaw.kitszel@intel.com, anthony.l.nguyen@intel.com, Prathosh.Satish@microchip.com, ivecera@redhat.com, jiri@resnulli.us, arkadiusz.kubalewski@intel.com, vadim.fedorenko@linux.dev, donald.hunter@gmail.com, horms@kernel.org, pabeni@redhat.com, kuba@kernel.org, davem@davemloft.net, Grzegorz Nitka , Aleksandr Loktionov Subject: [PATCH net-next 4/8] dpll: zl3073x: allow SyncE_Ref pin state change Date: Wed, 18 Mar 2026 10:06:50 +0100 Message-Id: <20260318090654.611349-5-grzegorz.nitka@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260318090654.611349-1-grzegorz.nitka@intel.com> References: <20260318090654.611349-1-grzegorz.nitka@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The SyncE_Ref pin may operate as either an active or inactive reference depending on board design and system configuration. Some platforms need to disable the SyncE reference dynamically (e.g., when selecting a different recovered clock input). The hardware supports toggling this pin, therefore advertise the STATE_CAN_CHANGE capability. Reviewed-by: Arkadiusz Kubalewski Reviewed-by: Aleksandr Loktionov Signed-off-by: Grzegorz Nitka --- drivers/dpll/zl3073x/prop.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/dpll/zl3073x/prop.c b/drivers/dpll/zl3073x/prop.c index ac9d41d0f978..acd7061a741a 100644 --- a/drivers/dpll/zl3073x/prop.c +++ b/drivers/dpll/zl3073x/prop.c @@ -215,6 +215,15 @@ struct zl3073x_pin_props *zl3073x_pin_props_get(struct zl3073x_dev *zldev, props->dpll_props.type = DPLL_PIN_TYPE_GNSS; + /* + * The SyncE_Ref pin supports enabling/disabling dynamically. + * Some platforms may choose to expose this through firmware + * configuration later. For now, advertise this capability + * universally since the hardware allows state toggling. + */ + props->dpll_props.capabilities |= + DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE; + /* The output pin phase adjustment granularity equals half of * the synth frequency count. */ -- 2.39.3