From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AEE9239DBDE; Tue, 24 Mar 2026 16:33:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.176.79.56 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774370041; cv=none; b=IQawbvYzOpr8E2XBgr6Bice+UYXWX7CDkZdyd9xoiG0SJmpkFUnXej5RSq0xaO6Z94p7x9IodV3U2Yq8t5mxvp2ok45czPmHf8XIZr1RX78a3frFlBZuVebwKLIsTfroGLbL7I/hC8tH8JhFq0C2NcFLfx9/raWBUZ768K/QM8w= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774370041; c=relaxed/simple; bh=QZMwDlyZkD0hnA0GvhBTY+Bx9MLfU4+XHkID/wiRKyc=; h=Date:From:To:CC:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=dUrroI4AjtU0nH9pGOhDHvAYAOdCF1Op9H6kRqh2HF0kpmq25n2FxP2zyPxjF7dwxRkyoay+29psX2XRt9ko2XSd2DZs+sdyIGub7l8zc1k8zVd6RxqK6t+UdSbjQGjsri65tR13H3D1Jv3eaoPKZduKiWtHhJ0u4qktzYkpLts= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=185.176.79.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.18.224.150]) by frasgout.his.huawei.com (SkyGuard) with ESMTPS id 4fgFw35B8ZzHnH5Q; Wed, 25 Mar 2026 00:33:23 +0800 (CST) Received: from dubpeml500005.china.huawei.com (unknown [7.214.145.207]) by mail.maildlp.com (Postfix) with ESMTPS id 64D984056A; Wed, 25 Mar 2026 00:33:57 +0800 (CST) Received: from localhost (10.203.177.15) by dubpeml500005.china.huawei.com (7.214.145.207) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Tue, 24 Mar 2026 16:33:56 +0000 Date: Tue, 24 Mar 2026 16:33:55 +0000 From: Jonathan Cameron To: CC: , , , , , , , , , Alejandro Lucero , Ben Cheatham , Edward Cree Subject: Re: [PATCH v24 02/11] cxl/sfc: Map cxl regs Message-ID: <20260324163355.0000748d@huawei.com> In-Reply-To: <20260323113117.2352709-3-alejandro.lucero-palau@amd.com> References: <20260323113117.2352709-1-alejandro.lucero-palau@amd.com> <20260323113117.2352709-3-alejandro.lucero-palau@amd.com> X-Mailer: Claws Mail 4.3.0 (GTK 3.24.42; x86_64-w64-mingw32) Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: lhrpeml500011.china.huawei.com (7.191.174.215) To dubpeml500005.china.huawei.com (7.214.145.207) On Mon, 23 Mar 2026 11:31:08 +0000 alejandro.lucero-palau@amd.com wrote: > From: Alejandro Lucero > > Export cxl core functions for a Type2 driver being able to discover and > map the device registers. > > Use it in sfc driver cxl initialization. > > Signed-off-by: Alejandro Lucero > Reviewed-by: Dan Williams > Reviewed-by: Jonathan Cameron > Reviewed-by: Dave Jiang > Reviewed-by: Ben Cheatham > Acked-by: Edward Cree One trivial thing that you might want to tidy up. Thanks, Jonathan > diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c > index 8e0481d8dced..7917118e4eba 100644 > --- a/drivers/net/ethernet/sfc/efx_cxl.c > +++ b/drivers/net/ethernet/sfc/efx_cxl.c > @@ -7,6 +7,8 @@ > > #include > > +#include > +#include > #include "net_driver.h" > #include "efx_cxl.h" > > @@ -18,6 +20,7 @@ int efx_cxl_init(struct efx_probe_data *probe_data) > struct pci_dev *pci_dev = efx->pci_dev; > struct efx_cxl *cxl; > u16 dvsec; > + int rc; > > probe_data->cxl_pio_initialised = false; > > @@ -44,6 +47,30 @@ int efx_cxl_init(struct efx_probe_data *probe_data) > if (!cxl) > return -ENOMEM; > > + rc = cxl_pci_setup_regs(pci_dev, CXL_REGLOC_RBI_COMPONENT, > + &cxl->cxlds.reg_map); > + if (rc) { > + pci_err(pci_dev, "No component registers\n"); > + return rc; > + } > + > + if (!cxl->cxlds.reg_map.component_map.hdm_decoder.valid) { > + pci_err(pci_dev, "Expected HDM component register not found\n"); > + return -ENODEV; > + } > + > + if (!cxl->cxlds.reg_map.component_map.ras.valid) { > + pci_err(pci_dev, "Expected RAS component register not found\n"); > + return -ENODEV; > + } > + > + /* Networking code. So wrong style. Ah the fun of patches that touch drivers/net and drivers/cxl :) > + * Set media ready explicitly as there are neither mailbox for checking > + * this state nor the CXL register involved, both not mandatory for > + * type2. > + */ > + cxl->cxlds.media_ready = true; > + > probe_data->cxl = cxl; > > return 0;