From: Ratheesh Kannoth <rkannoth@marvell.com>
To: <netdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: <sgoutham@marvell.com>, <davem@davemloft.net>,
<edumazet@google.com>, <kuba@kernel.org>, <pabeni@redhat.com>,
<horms@kernel.org>, <donald.hunter@gmail.com>, <jiri@resnulli.us>,
<chuck.lever@oracle.com>, <matttbe@kernel.org>,
<cjubran@nvidia.com>, <shshitrit@nvidia.com>,
<dtatulea@nvidia.com>, <tariqt@nvidia.com>,
Ratheesh Kannoth <rkannoth@marvell.com>
Subject: [PATCH v8 net-next 2/6] net/mlx5e: heap-allocate devlink param values
Date: Wed, 25 Mar 2026 12:51:55 +0530 [thread overview]
Message-ID: <20260325072159.1126964-3-rkannoth@marvell.com> (raw)
In-Reply-To: <20260325072159.1126964-1-rkannoth@marvell.com>
union devlink_param_value grows when U64 array params
are added to devlink. Keeping a four-element array of that
union on the stack in mlx5e_pcie_cong_get_thresh_config()
then trips -Wframe-larger-than=1280. Allocate the temporary
values with kcalloc() and free them on success and
error paths.
Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com>
---
.../ethernet/mellanox/mlx5/core/en/pcie_cong_event.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.c b/drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.c
index 2eb666a46f39..f02995552129 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.c
@@ -259,15 +259,21 @@ mlx5e_pcie_cong_get_thresh_config(struct mlx5_core_dev *dev,
MLX5_DEVLINK_PARAM_ID_PCIE_CONG_OUT_HIGH,
};
struct devlink *devlink = priv_to_devlink(dev);
- union devlink_param_value val[4];
+ union devlink_param_value *val;
+
+ val = kcalloc(4, sizeof(*val), GFP_KERNEL);
+ if (!val)
+ return -ENOMEM;
for (int i = 0; i < 4; i++) {
u32 id = ids[i];
int err;
err = devl_param_driverinit_value_get(devlink, id, &val[i]);
- if (err)
+ if (err) {
+ kfree(val);
return err;
+ }
}
config->inbound_low = val[0].vu16;
@@ -275,6 +281,7 @@ mlx5e_pcie_cong_get_thresh_config(struct mlx5_core_dev *dev,
config->outbound_low = val[2].vu16;
config->outbound_high = val[3].vu16;
+ kfree(val);
return 0;
}
--
2.43.0
next prev parent reply other threads:[~2026-03-25 7:22 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-25 7:21 [PATCH v8 net-next 0/6] octeontx2-af: npc: Enhancements Ratheesh Kannoth
2026-03-25 7:21 ` [PATCH v8 net-next 1/6] octeontx2-af: npc: cn20k: debugfs enhancements Ratheesh Kannoth
2026-03-25 7:21 ` Ratheesh Kannoth [this message]
2026-03-25 7:21 ` [PATCH v8 net-next 3/6] devlink: Implement devlink param multi attribute nested data values Ratheesh Kannoth
2026-03-25 7:21 ` [PATCH v8 net-next 4/6] octeontx2-af: npc: cn20k: add subbank search order control Ratheesh Kannoth
2026-03-25 7:21 ` [PATCH v8 net-next 5/6] octeontx2-af: npc: cn20k: dynamically allocate and free default MCAM entries Ratheesh Kannoth
2026-03-25 7:21 ` [PATCH v8 net-next 6/6] octeontx2-af: npc: Support for custom KPU profile from filesystem Ratheesh Kannoth
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