[PATCH 0/3] ksz87xx: add support for low-loss cable equalizer errata

[PATCH 0/3] ksz87xx: add support for low-loss cable equalizer errata

[Fidelio Lawson]

Hello,

This patch series adds support for the "Module 3: Equalizer fix for short
cables" erratum documented in Microchip KSZ87xx Errata DS80000687C.

According to the erratum, the embedded PHY receiver in KSZ87xx switches is
tuned by default for long, high-loss Ethernet cables. When operating with
short or low-loss cables (for example CAT5e or CAT6), the PHY equalizer may
over-amplify the incoming signal, leading to internal distortion and link
establishment failures.

Microchip provides two workarounds, each requiring a write to a different
indirect PHY register access mechanism.

This series introduces:

 - Device Tree bindings to enable the errata fix and select workaround 1 or 2,
 - driver-level parsing of these bindings,
 - implementation of the indirect register programming sequence required
   for Workaround 1 and Workaround 2.

If the errata is enabled but no mode is explicitly selected, the driver
defaults to Workaround 1, following Microchip guidance.

The feature is opt-in and does not affect existing platforms that do not
enable the errata.

Tested on KSZ8795 with both Workaround 1 and Workaround 2.

Signed-off-by: Fidelio Lawson <fidelio.lawson@exotec.com>
---
Fidelio Lawson (3):
      dt-bindings: dsa: microchip: add KSZ low-loss cable errata properties
      net: dsa: microchip: parse KSZ87xx low-loss errata from DT
      net: dsa: microchip: implement KSZ87xx Module 3 low-loss cable errata

 .../devicetree/bindings/net/dsa/microchip,ksz.yaml | 18 ++++++
 drivers/net/dsa/microchip/ksz8.c                   | 71 ++++++++++++++++++++++
 drivers/net/dsa/microchip/ksz8.h                   |  1 +
 drivers/net/dsa/microchip/ksz_common.h             |  9 +++
 4 files changed, 99 insertions(+)
---
base-commit: 2d1373e4246da3b58e1df058374ed6b101804e07
change-id: 20260323-ksz87xx_errata_low_loss_connections-b65e76e2b403

Best regards,
--  
Fidelio Lawson <fidelio.lawson@exotec.com>

[PATCH 1/3] dt-bindings: dsa: microchip: add KSZ low-loss cable errata properties

[Fidelio Lawson]

Microchip KSZ87xx switches are affected by the "Module 3: Equalizer fix
for short cables" erratum described in DS80000687C.
The embedded PHY receivers are tuned for long, high-loss cables,
which may cause signal distortion when operated with short or low-loss
cabling such as CAT5e or CAT6. In these cases,
the PHY may fail to establish a link due to internal over-amplification.

Two workarounds are provided by Microchip, each configuring a different
indirect register value to adjust the PHY equalizer settings.

This patch introduces two new device tree properties to enable and
select the appropriate workaround:

  - microchip,low-loss-errata-enable: boolean enabling the feature
  - microchip,low-loss-errata: selects workaround 1 or 2 (default: 1)

These properties allow board designers to opt into the errata fix
according to the targeted cable characteristics of their platform.

Signed-off-by: Fidelio Lawson <fidelio.lawson@exotec.com>
---
 .../devicetree/bindings/net/dsa/microchip,ksz.yaml     | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
index 8d4a3a9a33fc..ddfbc36aace6 100644
--- a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
+++ b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
@@ -85,6 +85,24 @@ properties:
     enum: [2000, 4000, 8000, 12000, 16000, 20000, 24000, 28000]
     default: 8000
 
+  microchip,low-loss-errata-enable:
+    description:
+      The receiver of the embedded PHYs is tuned by default to support long cable length applications. This was developed
+      using low quality, high loss cables. Because of this, the equalizer in the PHY may amplify high amplitude receiver signals
+      to the point that the signal is distorted internally, preventing a link from being established.
+      A more balanced receiver setting has been found that still functions at the long cable lengths and also supports
+      low loss applications.
+      If present, enables the selected errata workaround. If absent, the
+      workaround is disabled regardless of microchip,cat56-errata value.
+    type: boolean
+
+  microchip,low-loss-errata:
+    description:
+      Selects Microchip KSZ87xx CAT5e/CAT6 short-cable errata workaround.
+      1 = Workaround 1, 2 = Workaround 2. If omitted, workaround 1 is applied.
+    enum: [1, 2]
+    default: 1
+
   interrupts:
     maxItems: 1
 

-- 
2.53.0

Re: [PATCH 1/3] dt-bindings: dsa: microchip: add KSZ low-loss cable errata properties

[Rob Herring (Arm)]

On Thu, 26 Mar 2026 10:10:21 +0100, Fidelio Lawson wrote:
> Microchip KSZ87xx switches are affected by the "Module 3: Equalizer fix
> for short cables" erratum described in DS80000687C.
> The embedded PHY receivers are tuned for long, high-loss cables,
> which may cause signal distortion when operated with short or low-loss
> cabling such as CAT5e or CAT6. In these cases,
> the PHY may fail to establish a link due to internal over-amplification.
> 
> Two workarounds are provided by Microchip, each configuring a different
> indirect register value to adjust the PHY equalizer settings.
> 
> This patch introduces two new device tree properties to enable and
> select the appropriate workaround:
> 
>   - microchip,low-loss-errata-enable: boolean enabling the feature
>   - microchip,low-loss-errata: selects workaround 1 or 2 (default: 1)
> 
> These properties allow board designers to opt into the errata fix
> according to the targeted cable characteristics of their platform.
> 
> Signed-off-by: Fidelio Lawson <fidelio.lawson@exotec.com>
> ---
>  .../devicetree/bindings/net/dsa/microchip,ksz.yaml     | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:
./Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml:90:111: [warning] line too long (121 > 110 characters) (line-length)
./Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml:91:111: [warning] line too long (128 > 110 characters) (line-length)
./Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml:93:111: [warning] line too long (118 > 110 characters) (line-length)

dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml: microchip,low-loss-errata: missing type definition

doc reference errors (make refcheckdocs):

See https://patchwork.kernel.org/project/devicetree/patch/20260326-ksz87xx_errata_low_loss_connections-v1-1-79a698f43626@exotec.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.

Re: [PATCH 1/3] dt-bindings: dsa: microchip: add KSZ low-loss cable errata properties

[Andrew Lunn]

On Thu, Mar 26, 2026 at 10:10:21AM +0100, Fidelio Lawson wrote:
> Microchip KSZ87xx switches are affected by the "Module 3: Equalizer fix
> for short cables" erratum described in DS80000687C.
> The embedded PHY receivers are tuned for long, high-loss cables,
> which may cause signal distortion when operated with short or low-loss
> cabling such as CAT5e or CAT6. In these cases,
> the PHY may fail to establish a link due to internal over-amplification.
> 
> Two workarounds are provided by Microchip, each configuring a different
> indirect register value to adjust the PHY equalizer settings.
> 
> This patch introduces two new device tree properties to enable and
> select the appropriate workaround:
> 
>   - microchip,low-loss-errata-enable: boolean enabling the feature
>   - microchip,low-loss-errata: selects workaround 1 or 2 (default: 1)
> 
> These properties allow board designers to opt into the errata fix
> according to the targeted cable characteristics of their platform.

Does the errata give any indication how the two different workarounds
differ? How would a user decided which to use?

I also question if this should be a DT property. The length of the
cables is not a property of the board.

A PHY tunable would better reflect the same board can be used with
different cables, with different lengths/quality.

	  Andrew

[PATCH 2/3] net: dsa: microchip: parse KSZ87xx low-loss errata from DT

[Fidelio Lawson]

Add parsing of the new DT bindings related to the KSZ87xx low-loss cable
errata. The parsed values are stored in the ksz_device structure for use
during switch initialization.

If the enable property is present, the driver reads the errata mode
(microchip,low-loss-errata) and selects workaround 1 or 2 accordingly.
If the enable property is absent, the errata logic is fully disabled.

This keeps behavior fully backward-compatible with existing
device trees.

Signed-off-by: Fidelio Lawson <fidelio.lawson@exotec.com>
---
 drivers/net/dsa/microchip/ksz8.c       | 25 +++++++++++++++++++++++++
 drivers/net/dsa/microchip/ksz8.h       |  1 +
 drivers/net/dsa/microchip/ksz_common.h |  9 +++++++++
 3 files changed, 35 insertions(+)

diff --git a/drivers/net/dsa/microchip/ksz8.c b/drivers/net/dsa/microchip/ksz8.c
index c354abdafc1b..78b42cf50ce2 100644
--- a/drivers/net/dsa/microchip/ksz8.c
+++ b/drivers/net/dsa/microchip/ksz8.c
@@ -1989,6 +1989,10 @@ int ksz8_setup(struct dsa_switch *ds)
 			ret = ksz_rmw8(dev, REG_INT_ENABLE, INT_PME, 0);
 	}
 
+	/* Check if errata on low loss cable should be applied */
+	if (ksz_is_ksz87xx(dev))
+		ksz87xx_parse_errata_dt(dev);
+
 	if (!ret)
 		return ksz8_handle_global_errata(ds);
 	else
@@ -2096,6 +2100,27 @@ int ksz8463_w_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 val)
 	return 0;
 }
 
+void ksz87xx_parse_errata_dt(struct ksz_device *dev)
+{
+	struct device_node *np = dev->dev->of_node;
+	u32 mode;
+	int ret;
+
+	dev->low_loss_wa_enable = of_property_read_bool(np, "microchip,low-loss-errata-enable");
+
+	if (!dev->low_loss_wa_enable) {
+		dev->low_loss_wa_mode = KSZ_LOW_LOSS_WA_NONE;
+		return;
+	}
+
+	ret = of_property_read_u32(np, "microchip,low-loss-errata", &mode);
+
+	if (!ret && (mode == 1 || mode == 2))
+		dev->low_loss_wa_mode = mode;
+	else
+		dev->low_loss_wa_mode = KSZ_LOW_LOSS_WA_1;
+}
+
 int ksz8_switch_init(struct ksz_device *dev)
 {
 	dev->cpu_port = fls(dev->info->cpu_ports) - 1;
diff --git a/drivers/net/dsa/microchip/ksz8.h b/drivers/net/dsa/microchip/ksz8.h
index 0f2cd1474b44..3a43769a4c53 100644
--- a/drivers/net/dsa/microchip/ksz8.h
+++ b/drivers/net/dsa/microchip/ksz8.h
@@ -66,5 +66,6 @@ int ksz8_all_queues_split(struct ksz_device *dev, int queues);
 u32 ksz8463_get_port_addr(int port, int offset);
 int ksz8463_r_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);
 int ksz8463_w_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 val);
+void ksz87xx_parse_errata_dt(struct ksz_device *dev);
 
 #endif
diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h
index 929aff4c55de..f40e7bd20b3e 100644
--- a/drivers/net/dsa/microchip/ksz_common.h
+++ b/drivers/net/dsa/microchip/ksz_common.h
@@ -158,6 +158,12 @@ struct ksz_port {
 	bool manual_flow;
 };
 
+enum ksz_low_loss_wa_mode {
+	KSZ_LOW_LOSS_WA_NONE = 0,
+	KSZ_LOW_LOSS_WA_1    = 1,
+	KSZ_LOW_LOSS_WA_2    = 2,
+};
+
 struct ksz_device {
 	struct dsa_switch *ds;
 	struct ksz_platform_data *pdata;
@@ -219,6 +225,9 @@ struct ksz_device {
 	 * the switch’s internal PHYs, bypassing the main SPI interface.
 	 */
 	struct mii_bus *parent_mdio_bus;
+
+	bool low_loss_wa_enable;     /* low-loss cable errata activation */
+	enum ksz_low_loss_wa_mode low_loss_wa_mode;     /* low-loss cable Workaround to apply */
 };
 
 /* List of supported models */

-- 
2.53.0

[PATCH 3/3] net: dsa: microchip: implement KSZ87xx Module 3 low-loss cable errata

[Fidelio Lawson]

Implement the "Module 3: Equalizer fix for short cables" erratum from
Microchip document DS80000687C for KSZ87xx switches.

The issue affects short or low-loss cable links (e.g. CAT5e/CAT6),
where the PHY receiver equalizer may amplify high-amplitude signals
excessively, resulting in internal distortion and link establishment
failures.

Depending on the selected workaround (1 or 2), the driver writes a
specific value to the indirect PHY register
using the 6E/6F/A0 indirect access mechanism.

The errata fix is applied during global switch initialization when
enabled via device tree.

Signed-off-by: Fidelio Lawson <fidelio.lawson@exotec.com>
---
 drivers/net/dsa/microchip/ksz8.c | 46 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 46 insertions(+)

diff --git a/drivers/net/dsa/microchip/ksz8.c b/drivers/net/dsa/microchip/ksz8.c
index 78b42cf50ce2..b6f3a1ce85fc 100644
--- a/drivers/net/dsa/microchip/ksz8.c
+++ b/drivers/net/dsa/microchip/ksz8.c
@@ -1901,6 +1901,41 @@ void ksz8_phylink_mac_link_up(struct phylink_config *config,
 		ksz8_phy_port_link_up(dev, port, duplex, tx_pause, rx_pause);
 }
 
+static int ksz8_handle_module3_errata(struct ksz_device *dev)
+{
+	int ret = 0;
+	const u16 *regs = dev->info->regs;
+	u16 indir_reg = 0x0000;
+	u8 indir_val = 0x00;
+
+	switch (dev->low_loss_wa_mode) {
+	case KSZ_LOW_LOSS_WA_1:
+		indir_reg = 0x3C;
+		indir_val = 0x15;
+		break;
+	case KSZ_LOW_LOSS_WA_2:
+		indir_reg = 0x4C;
+		indir_val = 0x40;
+		break;
+	default:
+		break;
+	}
+
+	mutex_lock(&dev->alu_mutex);
+
+	ret = ksz_write8(dev, regs[REG_IND_CTRL_0], 0xA0);
+
+	if (!ret)
+		ret = ksz_write8(dev, 0x6F, indir_reg);
+
+	if (!ret)
+		ret = ksz_write8(dev, regs[REG_IND_BYTE], indir_val);
+
+	mutex_unlock(&dev->alu_mutex);
+
+	return ret;
+}
+
 static int ksz8_handle_global_errata(struct dsa_switch *ds)
 {
 	struct ksz_device *dev = ds->priv;
@@ -1915,6 +1950,17 @@ static int ksz8_handle_global_errata(struct dsa_switch *ds)
 	if (dev->info->ksz87xx_eee_link_erratum)
 		ret = ksz8_ind_write8(dev, TABLE_EEE, REG_IND_EEE_GLOB2_HI, 0);
 
+	/* KSZ87xx Errata DS80000687C.
+	 * Module 3: Equalizer fix for short cables
+	 * The receiver of the embedded PHYs is tuned by default
+	 * to support long cable length applications.
+	 * Because of this, the equalizer in the PHY may amplify
+	 * high amplitude receiver signals to the point that
+	 * the signal is distorted internally
+	 */
+	if (!ret && dev->low_loss_wa_enable && ksz_is_ksz87xx(dev))
+		ret = ksz8_handle_module3_errata(dev);
+
 	return ret;
 }
 

-- 
2.53.0

Re: [PATCH 3/3] net: dsa: microchip: implement KSZ87xx Module 3 low-loss cable errata

[Vladimir Oltean]

On Thu, Mar 26, 2026 at 10:10:23AM +0100, Fidelio Lawson wrote:
> Implement the "Module 3: Equalizer fix for short cables" erratum from
> Microchip document DS80000687C for KSZ87xx switches.
> 
> The issue affects short or low-loss cable links (e.g. CAT5e/CAT6),
> where the PHY receiver equalizer may amplify high-amplitude signals
> excessively, resulting in internal distortion and link establishment
> failures.
> 
> Depending on the selected workaround (1 or 2), the driver writes a
> specific value to the indirect PHY register
> using the 6E/6F/A0 indirect access mechanism.
> 
> The errata fix is applied during global switch initialization when
> enabled via device tree.
> 
> Signed-off-by: Fidelio Lawson <fidelio.lawson@exotec.com>
> ---
>  drivers/net/dsa/microchip/ksz8.c | 46 ++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 46 insertions(+)
> 
> diff --git a/drivers/net/dsa/microchip/ksz8.c b/drivers/net/dsa/microchip/ksz8.c
> index 78b42cf50ce2..b6f3a1ce85fc 100644
> --- a/drivers/net/dsa/microchip/ksz8.c
> +++ b/drivers/net/dsa/microchip/ksz8.c
> @@ -1901,6 +1901,41 @@ void ksz8_phylink_mac_link_up(struct phylink_config *config,
>  		ksz8_phy_port_link_up(dev, port, duplex, tx_pause, rx_pause);
>  }
>  
> +static int ksz8_handle_module3_errata(struct ksz_device *dev)
> +{
> +	int ret = 0;

"ret" does not need to be zero-initialized. It is unconditionally
overwritten by ksz_write8().

And please sort lines with variable declarations in decreasing line
length order. Netdev calls this "reverse Christmas tree" ordering and is
the preferred coding style.

> +	const u16 *regs = dev->info->regs;
> +	u16 indir_reg = 0x0000;
> +	u8 indir_val = 0x00;
> +
> +	switch (dev->low_loss_wa_mode) {
> +	case KSZ_LOW_LOSS_WA_1:
> +		indir_reg = 0x3C;
> +		indir_val = 0x15;
> +		break;
> +	case KSZ_LOW_LOSS_WA_2:
> +		indir_reg = 0x4C;
> +		indir_val = 0x40;

Do the 3c and 4c registers have any associated documentation? Do we know
what they are or what they do? We should have some macros for them,
instead of magic numbers.

> +		break;
> +	default:
> +		break;

Is it expected that in the default case (no workaround), the code flow
writes indir_val = 0x00 to indir_reg = 0x0000? Or would it be better to
just exit early without making any change?

> +	}
> +
> +	mutex_lock(&dev->alu_mutex);
> +
> +	ret = ksz_write8(dev, regs[REG_IND_CTRL_0], 0xA0);
> +
> +	if (!ret)
> +		ret = ksz_write8(dev, 0x6F, indir_reg);
> +
> +	if (!ret)
> +		ret = ksz_write8(dev, regs[REG_IND_BYTE], indir_val);

Is this sequence better suited for ksz8_ind_write8()? Perhaps wrapped in
another layer similar to ksz8_pme_write8(), once we know what the magic
numbers represent in terms of indirect table?

> +
> +	mutex_unlock(&dev->alu_mutex);
> +
> +	return ret;
> +}
> +
>  static int ksz8_handle_global_errata(struct dsa_switch *ds)
>  {
>  	struct ksz_device *dev = ds->priv;
> @@ -1915,6 +1950,17 @@ static int ksz8_handle_global_errata(struct dsa_switch *ds)
>  	if (dev->info->ksz87xx_eee_link_erratum)
>  		ret = ksz8_ind_write8(dev, TABLE_EEE, REG_IND_EEE_GLOB2_HI, 0);
>  
> +	/* KSZ87xx Errata DS80000687C.
> +	 * Module 3: Equalizer fix for short cables
> +	 * The receiver of the embedded PHYs is tuned by default
> +	 * to support long cable length applications.
> +	 * Because of this, the equalizer in the PHY may amplify
> +	 * high amplitude receiver signals to the point that
> +	 * the signal is distorted internally
> +	 */
> +	if (!ret && dev->low_loss_wa_enable && ksz_is_ksz87xx(dev))
> +		ret = ksz8_handle_module3_errata(dev);
> +
>  	return ret;
>  }
>  
> 
> -- 
> 2.53.0
> 

FYI, the driver is in a restructuring process. The ksz88xx_switch_ops
will be split out of the common ksz_switch_ops. This will conflict with
your series, so you should rebase on top of that much larger set.
You can coordinate with Bastien Curutchet to see what is the status:
https://lore.kernel.org/netdev/20260313153849.qkfzv5c2u6fepjku@skbuf

Re: [PATCH 3/3] net: dsa: microchip: implement KSZ87xx Module 3 low-loss cable errata

[Andrew Lunn]

> +	mutex_lock(&dev->alu_mutex);
> +
> +	ret = ksz_write8(dev, regs[REG_IND_CTRL_0], 0xA0);
> +
> +	if (!ret)
> +		ret = ksz_write8(dev, 0x6F, indir_reg);
> +
> +	if (!ret)
> +		ret = ksz_write8(dev, regs[REG_IND_BYTE], indir_val);
> +
> +	mutex_unlock(&dev->alu_mutex);

What address space are these registers in? Normally workarounds for a
PHY would be in the PHY driver. But that assumes the registers are
accessible from the PHY driver.

	   Andrew

Re: [PATCH 3/3] net: dsa: microchip: implement KSZ87xx Module 3 low-loss cable errata

[Marek Vasut]

[-- Attachment #1: Type: text/plain, Size: 5627 bytes --]

On 3/26/26 10:10 AM, Fidelio Lawson wrote:

> +static int ksz8_handle_module3_errata(struct ksz_device *dev)
> +{
> +	int ret = 0;
> +	const u16 *regs = dev->info->regs;
> +	u16 indir_reg = 0x0000;
> +	u8 indir_val = 0x00;
> +
> +	switch (dev->low_loss_wa_mode) {
> +	case KSZ_LOW_LOSS_WA_1:
> +		indir_reg = 0x3C;
> +		indir_val = 0x15;
> +		break;
> +	case KSZ_LOW_LOSS_WA_2:
> +		indir_reg = 0x4C;
> +		indir_val = 0x40;
> +		break;
> +	default:
> +		break;
> +	}
> +
> +	mutex_lock(&dev->alu_mutex);
> +
> +	ret = ksz_write8(dev, regs[REG_IND_CTRL_0], 0xA0);
> +
> +	if (!ret)
> +		ret = ksz_write8(dev, 0x6F, indir_reg);
> +
> +	if (!ret)
> +		ret = ksz_write8(dev, regs[REG_IND_BYTE], indir_val);
> +
> +	mutex_unlock(&dev->alu_mutex);
> +
> +	return ret;
> +}
Since this is configurable from DT, please adjust the bindings and make 
the low pass filter bandwidth actually configurable according to the 
values supported by the hardware, see this article:

https://microchip.my.site.com/s/article/Solution-for-Using-CAT-5E-or-CAT-6-Short-Cable-with-a-Link-Issue-for-the-KSZ8795-Family

The indirect register (0x4C) is an 8-bit register. The bits [7:6] are 
described in the table below.

Low pass filter bandwidth
00 = 90MHz
01 = 62MHz
10 = 55MHz
11 = 44MHz

...

I had this attached patch in my tree for a while, I just never got 
around to finishing it, because even with this in place, there was some 
packet loss with short cables at low temperatures. Maybe it can help:

 From 937278ee6dc0aa46797cc4b2d53078f95b6557a9 Mon Sep 17 00:00:00 2001
From: Marek Vasut <marex@nabladev.com>
Date: Mon, 2 Jun 2025 01:42:17 +0200
Subject: [PATCH] net: dsa: microchip: Fix KSZ87xx high quality cable errata
  module 3

KSZ87xx may fail to establish link, or may take long time to
establish link, when using high quality > CAT-5 ethernet cables.
This is described in KSZ87xx Errata DS80000687C Module 3:

Module 3: Establishing a link through low loss connections.
   The receiver of the embedded PHYs is tuned by default to
   support long cable length applications. This was developed
   using low quality, high loss cables. Because of this, the
   equalizer in the PHY may amplify high amplitude receiver
   signals to the point that the signal is distorted internally,
   preventing a link from being established.

More detailed description and a more advanced fix is described in
"
Solution for Using CAT-5E or CAT-6 Short Cable with a Link Issue
for the KSZ8795 Family
"
https://microchip.my.site.com/s/article/Solution-for-Using-CAT-5E-or-CAT-6-Short-Cable-with-a-Link-Issue-for-the-KSZ8795-Family

The fix reduces low pass filter bandwidth from 90 MHz to 62 MHz
to block higher frequency components which make it through the
higher quality cables and saturate the receiver amplifier. In
case of even shorter cables, the link equalizer function has to
start from position 0 instead of the default position 0xf to
cater for those cables, configure the equalizer position as well.

Signed-off-by: Marek Vasut <marex@nabladev.com>
---
  drivers/net/dsa/microchip/ksz8.c     | 33 ++++++++++++++++++++++++++--
  drivers/net/dsa/microchip/ksz8_reg.h |  2 +-
  2 files changed, 32 insertions(+), 3 deletions(-)

diff --git a/drivers/net/dsa/microchip/ksz8.c 
b/drivers/net/dsa/microchip/ksz8.c
index 3309c2c172f02..f8716c8d0d375 100644
--- a/drivers/net/dsa/microchip/ksz8.c
+++ b/drivers/net/dsa/microchip/ksz8.c
@@ -1891,10 +1891,39 @@ static int ksz8_handle_global_errata(struct 
dsa_switch *ds)
  	 *   KSZ879x/KSZ877x/KSZ876x and some EEE link partners may result in
  	 *   the link dropping.
  	 */
-	if (dev->info->ksz87xx_eee_link_erratum)
+	if (dev->info->ksz87xx_eee_link_erratum) {
  		ret = ksz8_ind_write8(dev, TABLE_EEE, REG_IND_EEE_GLOB2_HI, 0);
+		if (ret)
+			return ret;
+	}

-	return ret;
+	/*
+	 * Module 3: Establishing a link through low loss connections.
+	 *   The receiver of the embedded PHYs is tuned by default to
+	 *   support long cable length applications. This was developed
+	 *   using low quality, high loss cables. Because of this, the
+	 *   equalizer in the PHY may amplify high amplitude receiver
+	 *   signals to the point that the signal is distorted internally,
+	 *   preventing a link from being established.
+	 *
+	 * More detailed description and a more advanced fix is described in
+	 * "
+	 * Solution for Using CAT-5E or CAT-6 Short Cable with a Link Issue
+	 * for the KSZ8795 Family
+	 * "
+	 * 
https://microchip.my.site.com/s/article/Solution-for-Using-CAT-5E-or-CAT-6-Short-Cable-with-a-Link-Issue-for-the-KSZ8795-Family
+	 *
+	 * The following two magic writes are the implementation of the
+	 * aforementioned workaround.
+	 */
+
+	/* Force low pass filter bandwidth from 90 MHz to 62 MHz */
+	ret = ksz8_ind_write8(dev, TABLE_LINK_MD, 0x4c, 0x40);
+	if (ret)
+		return ret;
+
+	/* Force DSP EQ initial value to 0 */
+	return ksz8_ind_write8(dev, TABLE_LINK_MD, 0x08, 0);
  }

  int ksz8_enable_stp_addr(struct ksz_device *dev)
diff --git a/drivers/net/dsa/microchip/ksz8_reg.h 
b/drivers/net/dsa/microchip/ksz8_reg.h
index 329688603a582..c4897f27c6d1c 100644
--- a/drivers/net/dsa/microchip/ksz8_reg.h
+++ b/drivers/net/dsa/microchip/ksz8_reg.h
@@ -342,7 +342,7 @@
  #define TABLE_EEE			(TABLE_EEE_V << TABLE_EXT_SELECT_S)
  #define TABLE_ACL			(TABLE_ACL_V << TABLE_EXT_SELECT_S)
  #define TABLE_PME			(TABLE_PME_V << TABLE_EXT_SELECT_S)
-#define TABLE_LINK_MD			(TABLE_LINK_MD << TABLE_EXT_SELECT_S)
+#define TABLE_LINK_MD			(TABLE_LINK_MD_V << TABLE_EXT_SELECT_S)
  #define TABLE_READ			BIT(4)
  #define TABLE_SELECT_S			2
  #define TABLE_STATIC_MAC_V		0
-- 
2.53.0

[-- Attachment #2: 0001-net-dsa-microchip-Fix-KSZ87xx-high-quality-cable-err.patch --]
[-- Type: text/x-patch, Size: 4121 bytes --]

From 937278ee6dc0aa46797cc4b2d53078f95b6557a9 Mon Sep 17 00:00:00 2001
From: Marek Vasut <marex@nabladev.com>
Date: Mon, 2 Jun 2025 01:42:17 +0200
Subject: [PATCH] net: dsa: microchip: Fix KSZ87xx high quality cable errata
 module 3

KSZ87xx may fail to establish link, or may take long time to
establish link, when using high quality > CAT-5 ethernet cables.
This is described in KSZ87xx Errata DS80000687C Module 3:

Module 3: Establishing a link through low loss connections.
  The receiver of the embedded PHYs is tuned by default to
  support long cable length applications. This was developed
  using low quality, high loss cables. Because of this, the
  equalizer in the PHY may amplify high amplitude receiver
  signals to the point that the signal is distorted internally,
  preventing a link from being established.

More detailed description and a more advanced fix is described in
"
Solution for Using CAT-5E or CAT-6 Short Cable with a Link Issue
for the KSZ8795 Family
"
https://microchip.my.site.com/s/article/Solution-for-Using-CAT-5E-or-CAT-6-Short-Cable-with-a-Link-Issue-for-the-KSZ8795-Family

The fix reduces low pass filter bandwidth from 90 MHz to 62 MHz
to block higher frequency components which make it through the
higher quality cables and saturate the receiver amplifier. In
case of even shorter cables, the link equalizer function has to
start from position 0 instead of the default position 0xf to
cater for those cables, configure the equalizer position as well.

Signed-off-by: Marek Vasut <marex@nabladev.com>
---
 drivers/net/dsa/microchip/ksz8.c     | 33 ++++++++++++++++++++++++++--
 drivers/net/dsa/microchip/ksz8_reg.h |  2 +-
 2 files changed, 32 insertions(+), 3 deletions(-)

diff --git a/drivers/net/dsa/microchip/ksz8.c b/drivers/net/dsa/microchip/ksz8.c
index 3309c2c172f02..f8716c8d0d375 100644
--- a/drivers/net/dsa/microchip/ksz8.c
+++ b/drivers/net/dsa/microchip/ksz8.c
@@ -1891,10 +1891,39 @@ static int ksz8_handle_global_errata(struct dsa_switch *ds)
 	 *   KSZ879x/KSZ877x/KSZ876x and some EEE link partners may result in
 	 *   the link dropping.
 	 */
-	if (dev->info->ksz87xx_eee_link_erratum)
+	if (dev->info->ksz87xx_eee_link_erratum) {
 		ret = ksz8_ind_write8(dev, TABLE_EEE, REG_IND_EEE_GLOB2_HI, 0);
+		if (ret)
+			return ret;
+	}
 
-	return ret;
+	/*
+	 * Module 3: Establishing a link through low loss connections.
+	 *   The receiver of the embedded PHYs is tuned by default to
+	 *   support long cable length applications. This was developed
+	 *   using low quality, high loss cables. Because of this, the
+	 *   equalizer in the PHY may amplify high amplitude receiver
+	 *   signals to the point that the signal is distorted internally,
+	 *   preventing a link from being established.
+	 *
+	 * More detailed description and a more advanced fix is described in
+	 * "
+	 * Solution for Using CAT-5E or CAT-6 Short Cable with a Link Issue
+	 * for the KSZ8795 Family
+	 * "
+	 * https://microchip.my.site.com/s/article/Solution-for-Using-CAT-5E-or-CAT-6-Short-Cable-with-a-Link-Issue-for-the-KSZ8795-Family
+	 *
+	 * The following two magic writes are the implementation of the
+	 * aforementioned workaround.
+	 */
+
+	/* Force low pass filter bandwidth from 90 MHz to 62 MHz */
+	ret = ksz8_ind_write8(dev, TABLE_LINK_MD, 0x4c, 0x40);
+	if (ret)
+		return ret;
+
+	/* Force DSP EQ initial value to 0 */
+	return ksz8_ind_write8(dev, TABLE_LINK_MD, 0x08, 0);
 }
 
 int ksz8_enable_stp_addr(struct ksz_device *dev)
diff --git a/drivers/net/dsa/microchip/ksz8_reg.h b/drivers/net/dsa/microchip/ksz8_reg.h
index 329688603a582..c4897f27c6d1c 100644
--- a/drivers/net/dsa/microchip/ksz8_reg.h
+++ b/drivers/net/dsa/microchip/ksz8_reg.h
@@ -342,7 +342,7 @@
 #define TABLE_EEE			(TABLE_EEE_V << TABLE_EXT_SELECT_S)
 #define TABLE_ACL			(TABLE_ACL_V << TABLE_EXT_SELECT_S)
 #define TABLE_PME			(TABLE_PME_V << TABLE_EXT_SELECT_S)
-#define TABLE_LINK_MD			(TABLE_LINK_MD << TABLE_EXT_SELECT_S)
+#define TABLE_LINK_MD			(TABLE_LINK_MD_V << TABLE_EXT_SELECT_S)
 #define TABLE_READ			BIT(4)
 #define TABLE_SELECT_S			2
 #define TABLE_STATIC_MAC_V		0
-- 
2.53.0