* [PATCH net V2 0/2] Correct BD length masks and BQL accounting for multi-BD TX packets @ 2026-03-27 7:32 Suraj Gupta 2026-03-27 7:32 ` [PATCH net V2 1/2] net: xilinx: axienet: Correct BD length masks to match AXIDMA IP spec Suraj Gupta 2026-03-27 7:32 ` [PATCH net V2 2/2] net: xilinx: axienet: Fix BQL accounting for multi-BD TX packets Suraj Gupta 0 siblings, 2 replies; 4+ messages in thread From: Suraj Gupta @ 2026-03-27 7:32 UTC (permalink / raw) To: Radhey Shyam Pandey, Andrew Lunn, David S . Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni Cc: Michal Simek, Sean Anderson, Daniel Borkmann, Ariane Keller, netdev, linux-arm-kernel, linux-kernel This patch series fixes two issues in the Xilinx AXI Ethernet driver: 1. Corrects the BD length masks to match the AXIDMA IP spec. 2. Fixes BQL accounting for multi-BD TX packets. --- Changes in V2: - Define BD length masks with GENMASK(25, 0) per PG021. - Credit BQL using skb->len on packet completion instead of summing per-BD actual lengths from descriptor status. --- Suraj Gupta (2): net: xilinx: axienet: Correct BD length masks to match AXIDMA IP spec net: xilinx: axienet: Fix BQL accounting for multi-BD TX packets drivers/net/ethernet/xilinx/xilinx_axienet.h | 4 ++-- drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 9 ++++----- 2 files changed, 6 insertions(+), 7 deletions(-) -- 2.49.1 ^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH net V2 1/2] net: xilinx: axienet: Correct BD length masks to match AXIDMA IP spec 2026-03-27 7:32 [PATCH net V2 0/2] Correct BD length masks and BQL accounting for multi-BD TX packets Suraj Gupta @ 2026-03-27 7:32 ` Suraj Gupta 2026-03-27 7:32 ` [PATCH net V2 2/2] net: xilinx: axienet: Fix BQL accounting for multi-BD TX packets Suraj Gupta 1 sibling, 0 replies; 4+ messages in thread From: Suraj Gupta @ 2026-03-27 7:32 UTC (permalink / raw) To: Radhey Shyam Pandey, Andrew Lunn, David S . Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni Cc: Michal Simek, Sean Anderson, Daniel Borkmann, Ariane Keller, netdev, linux-arm-kernel, linux-kernel The XAXIDMA_BD_CTRL_LENGTH_MASK and XAXIDMA_BD_STS_ACTUAL_LEN_MASK macros were defined as 0x007FFFFF (23 bits), but the AXI DMA IP product guide (PG021) specifies the buffer length field as bits 25:0 (26 bits). Update both masks to match the IP documentation. In practice this had no functional impact, since Ethernet frames are far smaller than 2^23 bytes and the extra bits were always zero, but the masks should still reflect the hardware specification. Fixes: 8a3b7a252dca ("drivers/net/ethernet/xilinx: added Xilinx AXI Ethernet driver") Signed-off-by: Suraj Gupta <suraj.gupta2@amd.com> --- drivers/net/ethernet/xilinx/xilinx_axienet.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet.h b/drivers/net/ethernet/xilinx/xilinx_axienet.h index 5ff742103beb..fcd3aaef27fc 100644 --- a/drivers/net/ethernet/xilinx/xilinx_axienet.h +++ b/drivers/net/ethernet/xilinx/xilinx_axienet.h @@ -105,7 +105,7 @@ #define XAXIDMA_BD_HAS_DRE_MASK 0xF00 /* Whether has DRE mask */ #define XAXIDMA_BD_WORDLEN_MASK 0xFF /* Whether has DRE mask */ -#define XAXIDMA_BD_CTRL_LENGTH_MASK 0x007FFFFF /* Requested len */ +#define XAXIDMA_BD_CTRL_LENGTH_MASK GENMASK(25, 0) /* Requested len */ #define XAXIDMA_BD_CTRL_TXSOF_MASK 0x08000000 /* First tx packet */ #define XAXIDMA_BD_CTRL_TXEOF_MASK 0x04000000 /* Last tx packet */ #define XAXIDMA_BD_CTRL_ALL_MASK 0x0C000000 /* All control bits */ @@ -130,7 +130,7 @@ #define XAXIDMA_BD_CTRL_TXEOF_MASK 0x04000000 /* Last tx packet */ #define XAXIDMA_BD_CTRL_ALL_MASK 0x0C000000 /* All control bits */ -#define XAXIDMA_BD_STS_ACTUAL_LEN_MASK 0x007FFFFF /* Actual len */ +#define XAXIDMA_BD_STS_ACTUAL_LEN_MASK GENMASK(25, 0) /* Actual len */ #define XAXIDMA_BD_STS_COMPLETE_MASK 0x80000000 /* Completed */ #define XAXIDMA_BD_STS_DEC_ERR_MASK 0x40000000 /* Decode error */ #define XAXIDMA_BD_STS_SLV_ERR_MASK 0x20000000 /* Slave error */ -- 2.49.1 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH net V2 2/2] net: xilinx: axienet: Fix BQL accounting for multi-BD TX packets 2026-03-27 7:32 [PATCH net V2 0/2] Correct BD length masks and BQL accounting for multi-BD TX packets Suraj Gupta 2026-03-27 7:32 ` [PATCH net V2 1/2] net: xilinx: axienet: Correct BD length masks to match AXIDMA IP spec Suraj Gupta @ 2026-03-27 7:32 ` Suraj Gupta 1 sibling, 0 replies; 4+ messages in thread From: Suraj Gupta @ 2026-03-27 7:32 UTC (permalink / raw) To: Radhey Shyam Pandey, Andrew Lunn, David S . Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni Cc: Michal Simek, Sean Anderson, Daniel Borkmann, Ariane Keller, netdev, linux-arm-kernel, linux-kernel When a TX packet spans multiple buffer descriptors (scatter-gather), axienet_free_tx_chain sums the per-BD actual length from descriptor status into a caller-provided accumulator. That sum is reset on each NAPI poll. If the BDs for a single packet complete across different polls, the earlier bytes are lost and never credited to BQL. This causes BQL to think bytes are permanently in-flight, eventually stalling the TX queue. The SKB pointer is stored only on the last BD of a packet. When that BD completes, use skb->len for the byte count instead of summing per-BD status lengths. This matches netdev_sent_queue(), which debits skb->len, and naturally survives across polls because no partial packet contributes to the accumulator. Fixes: c900e49d58eb ("net: xilinx: axienet: Implement BQL") Signed-off-by: Suraj Gupta <suraj.gupta2@amd.com> --- drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c index b06e4c37ff61..263c4b67fd5a 100644 --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c @@ -770,8 +770,8 @@ static int axienet_device_reset(struct net_device *ndev) * @first_bd: Index of first descriptor to clean up * @nr_bds: Max number of descriptors to clean up * @force: Whether to clean descriptors even if not complete - * @sizep: Pointer to a u32 filled with the total sum of all bytes - * in all cleaned-up descriptors. Ignored if NULL. + * @sizep: Pointer to a u32 accumulating the total byte count of + * completed packets (using skb->len). Ignored if NULL. * @budget: NAPI budget (use 0 when not called from NAPI poll) * * Would either be called after a successful transmit operation, or after @@ -805,6 +805,8 @@ static int axienet_free_tx_chain(struct axienet_local *lp, u32 first_bd, DMA_TO_DEVICE); if (cur_p->skb && (status & XAXIDMA_BD_STS_COMPLETE_MASK)) { + if (sizep) + *sizep += cur_p->skb->len; napi_consume_skb(cur_p->skb, budget); packets++; } @@ -818,9 +820,6 @@ static int axienet_free_tx_chain(struct axienet_local *lp, u32 first_bd, wmb(); cur_p->cntrl = 0; cur_p->status = 0; - - if (sizep) - *sizep += status & XAXIDMA_BD_STS_ACTUAL_LEN_MASK; } if (!force) { -- 2.49.1 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH net V2 0/2] Correct BD length masks and BQL accounting for multi-BD TX packets @ 2026-03-26 18:55 Suraj Gupta 2026-03-26 18:55 ` [PATCH net V2 2/2] net: xilinx: axienet: Fix " Suraj Gupta 0 siblings, 1 reply; 4+ messages in thread From: Suraj Gupta @ 2026-03-26 18:55 UTC (permalink / raw) To: andrew+netdev, davem, edumazet, kuba, pabeni, michal.simek, sean.anderson, radhey.shyam.pandey, horms Cc: netdev, linux-arm-kernel, linux-kernel, harini.katakam This patch series fixes two issues in the Xilinx AXI Ethernet driver: 1. Corrects the BD length masks to match the AXIDMA IP spec. 2. Fixes BQL accounting for multi-BD TX packets. --- Changes in V2: Use GENMASK() to define the BD length masks. --- Suraj Gupta (2): net: xilinx: axienet: Correct BD length masks to match AXIDMA IP spec net: xilinx: axienet: Fix BQL accounting for multi-BD TX packets drivers/net/ethernet/xilinx/xilinx_axienet.h | 7 +++++-- .../net/ethernet/xilinx/xilinx_axienet_main.c | 20 +++++++++---------- 2 files changed, 15 insertions(+), 12 deletions(-) -- 2.49.1 ^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH net V2 2/2] net: xilinx: axienet: Fix BQL accounting for multi-BD TX packets 2026-03-26 18:55 [PATCH net V2 0/2] Correct BD length masks and " Suraj Gupta @ 2026-03-26 18:55 ` Suraj Gupta 0 siblings, 0 replies; 4+ messages in thread From: Suraj Gupta @ 2026-03-26 18:55 UTC (permalink / raw) To: andrew+netdev, davem, edumazet, kuba, pabeni, michal.simek, sean.anderson, radhey.shyam.pandey, horms Cc: netdev, linux-arm-kernel, linux-kernel, harini.katakam When a TX packet spans multiple buffer descriptors (scatter-gather), the per-BD byte count is accumulated into a local variable that resets on each NAPI poll. If the BDs for a single packet complete across different polls, the earlier bytes are lost and never credited to BQL. This causes BQL to think bytes are permanently in-flight, eventually stalling the TX queue. Fix this by replacing the local accumulator with a persistent counter (tx_compl_bytes) that survives across polls and is reset only after updating BQL and stats. Fixes: c900e49d58eb ("net: xilinx: axienet: Implement BQL") Signed-off-by: Suraj Gupta <suraj.gupta2@amd.com> --- drivers/net/ethernet/xilinx/xilinx_axienet.h | 3 +++ .../net/ethernet/xilinx/xilinx_axienet_main.c | 20 +++++++++---------- 2 files changed, 13 insertions(+), 10 deletions(-) diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet.h b/drivers/net/ethernet/xilinx/xilinx_axienet.h index 602389843342..a4444c939451 100644 --- a/drivers/net/ethernet/xilinx/xilinx_axienet.h +++ b/drivers/net/ethernet/xilinx/xilinx_axienet.h @@ -509,6 +509,8 @@ struct skbuf_dma_descriptor { * complete. Only updated at runtime by TX NAPI poll. * @tx_bd_tail: Stores the index of the next Tx buffer descriptor in the ring * to be populated. + * @tx_compl_bytes: Accumulates TX completion length until a full packet is + * reported to the stack. * @tx_packets: TX packet count for statistics * @tx_bytes: TX byte count for statistics * @tx_stat_sync: Synchronization object for TX stats @@ -592,6 +594,7 @@ struct axienet_local { u32 tx_bd_num; u32 tx_bd_ci; u32 tx_bd_tail; + u32 tx_compl_bytes; u64_stats_t tx_packets; u64_stats_t tx_bytes; struct u64_stats_sync tx_stat_sync; diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c index b06e4c37ff61..95bf61986cb7 100644 --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c @@ -692,6 +692,8 @@ static void axienet_dma_stop(struct axienet_local *lp) axienet_lock_mii(lp); __axienet_device_reset(lp); axienet_unlock_mii(lp); + + lp->tx_compl_bytes = 0; } /** @@ -770,8 +772,6 @@ static int axienet_device_reset(struct net_device *ndev) * @first_bd: Index of first descriptor to clean up * @nr_bds: Max number of descriptors to clean up * @force: Whether to clean descriptors even if not complete - * @sizep: Pointer to a u32 filled with the total sum of all bytes - * in all cleaned-up descriptors. Ignored if NULL. * @budget: NAPI budget (use 0 when not called from NAPI poll) * * Would either be called after a successful transmit operation, or after @@ -780,7 +780,7 @@ static int axienet_device_reset(struct net_device *ndev) * Return: The number of packets handled. */ static int axienet_free_tx_chain(struct axienet_local *lp, u32 first_bd, - int nr_bds, bool force, u32 *sizep, int budget) + int nr_bds, bool force, int budget) { struct axidma_bd *cur_p; unsigned int status; @@ -819,8 +819,8 @@ static int axienet_free_tx_chain(struct axienet_local *lp, u32 first_bd, cur_p->cntrl = 0; cur_p->status = 0; - if (sizep) - *sizep += status & XAXIDMA_BD_STS_ACTUAL_LEN_MASK; + if (!force) + lp->tx_compl_bytes += status & XAXIDMA_BD_STS_ACTUAL_LEN_MASK; } if (!force) { @@ -999,18 +999,18 @@ static int axienet_tx_poll(struct napi_struct *napi, int budget) { struct axienet_local *lp = container_of(napi, struct axienet_local, napi_tx); struct net_device *ndev = lp->ndev; - u32 size = 0; int packets; packets = axienet_free_tx_chain(lp, lp->tx_bd_ci, lp->tx_bd_num, false, - &size, budget); + budget); if (packets) { - netdev_completed_queue(ndev, packets, size); + netdev_completed_queue(ndev, packets, lp->tx_compl_bytes); u64_stats_update_begin(&lp->tx_stat_sync); u64_stats_add(&lp->tx_packets, packets); - u64_stats_add(&lp->tx_bytes, size); + u64_stats_add(&lp->tx_bytes, lp->tx_compl_bytes); u64_stats_update_end(&lp->tx_stat_sync); + lp->tx_compl_bytes = 0; /* Matches barrier in axienet_start_xmit */ smp_mb(); @@ -1115,7 +1115,7 @@ axienet_start_xmit(struct sk_buff *skb, struct net_device *ndev) netdev_err(ndev, "TX DMA mapping error\n"); ndev->stats.tx_dropped++; axienet_free_tx_chain(lp, orig_tail_ptr, ii + 1, - true, NULL, 0); + true, 0); dev_kfree_skb_any(skb); return NETDEV_TX_OK; } -- 2.49.1 ^ permalink raw reply related [flat|nested] 4+ messages in thread
end of thread, other threads:[~2026-03-27 7:33 UTC | newest] Thread overview: 4+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-03-27 7:32 [PATCH net V2 0/2] Correct BD length masks and BQL accounting for multi-BD TX packets Suraj Gupta 2026-03-27 7:32 ` [PATCH net V2 1/2] net: xilinx: axienet: Correct BD length masks to match AXIDMA IP spec Suraj Gupta 2026-03-27 7:32 ` [PATCH net V2 2/2] net: xilinx: axienet: Fix BQL accounting for multi-BD TX packets Suraj Gupta -- strict thread matches above, loose matches on Subject: below -- 2026-03-26 18:55 [PATCH net V2 0/2] Correct BD length masks and " Suraj Gupta 2026-03-26 18:55 ` [PATCH net V2 2/2] net: xilinx: axienet: Fix " Suraj Gupta
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