From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 45DE93A783B for ; Mon, 30 Mar 2026 23:02:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774911777; cv=none; b=AE4iZETmXwQqUV8A9MQpZOkdyNWHYb5TJ0+BwUBtOTciTfAIOn3pSEjouRVo1jmwH7NSEY9mj8ql46t4QLEiSJlgwY4n+AOctVh0T68TYuMitmCl7w7H4Z051a7f0qEOGz5vTbVv6p5O/j9qT5SNC6cFTnGmCNfWWS/No0ro78o= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774911777; c=relaxed/simple; bh=dcaOYm/DzivhRd1/da6c5PPKmLcg0wKHMI7sblltGOE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=btpd19rZAbefLbIwg4yF1+oc/sotP2II6uB3Ea1nHs19TbhqLFpXFsMq4ml7yXsqpQFMTLmc3lDTEJZ5kkpjrvldws0JMHqj09Ra/caCgBTe5DqeFgjH0JAg/rnU+8wRuhJdHlr88UJHne8t5C8GkpxO8U/+M/K/nrs/iHQyCNU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=k3y4aqMI; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="k3y4aqMI" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774911776; x=1806447776; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dcaOYm/DzivhRd1/da6c5PPKmLcg0wKHMI7sblltGOE=; b=k3y4aqMIv3SkUApNagPbn1iF62045zB55JDmQUmGc9pYgKouDVnYdpV5 P3d9412sIsCtZtsdzdwuaJTrj2+rsf39zQ+Tm2HnKekKKI8PGcRT+Zf8w nNz3kyGSYHZ7Ma7ZEElMFaIFXmszLG2f8MessRLhKgN23hv5LMcQ4XSyG VcZUNzdOVfuLeDivoEyz8bUMta/sdWV5MtZSO50Lf0+mJ8Sf1c18r9cMP Vze1eZM/Agmmsyh8RzEelFRf5qIe5IowAFLOVXy0gT7PuG/HiENh8imJN X/XwrOkE3Xa6ZO6s8zkVcvN2ZJupY4a9Eno9SfSWMLNfxnNZk+FyY9aqi w==; X-CSE-ConnectionGUID: Gi5HUWo2TL29yMFXNlXOlw== X-CSE-MsgGUID: iOxShNPNTPO2UIXY1wJcZA== X-IronPort-AV: E=McAfee;i="6800,10657,11744"; a="93297570" X-IronPort-AV: E=Sophos;i="6.23,150,1770624000"; d="scan'208";a="93297570" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2026 16:02:53 -0700 X-CSE-ConnectionGUID: Gtr/kKQyRtyrnNTufDX3YA== X-CSE-MsgGUID: 6a8vEUP7SnunCkWMdSHmqQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,150,1770624000"; d="scan'208";a="256687714" Received: from anguy11-upstream.jf.intel.com ([10.166.9.133]) by orviesa002.jf.intel.com with ESMTP; 30 Mar 2026 16:02:53 -0700 From: Tony Nguyen To: davem@davemloft.net, kuba@kernel.org, pabeni@redhat.com, edumazet@google.com, andrew+netdev@lunn.ch, netdev@vger.kernel.org Cc: Kohei Enju , anthony.l.nguyen@intel.com, dima.ruinskiy@intel.com, kohei.enju@gmail.com, horms@kernel.org, Aleksandr Loktionov , Avigail Dahan Subject: [PATCH net-next 04/15] igc: prepare for RSS key get/set support Date: Mon, 30 Mar 2026 16:02:33 -0700 Message-ID: <20260330230248.646900-5-anthony.l.nguyen@intel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20260330230248.646900-1-anthony.l.nguyen@intel.com> References: <20260330230248.646900-1-anthony.l.nguyen@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Kohei Enju Store the RSS key inside struct igc_adapter and introduce the igc_write_rss_key() helper function. This allows the driver to program the RSSRK registers using a persistent RSS key, instead of using a stack-local buffer in igc_setup_mrqc(). This is a preparation patch for adding RSS key get/set support in subsequent changes, and no functional change is intended in this patch. Signed-off-by: Kohei Enju Reviewed-by: Aleksandr Loktionov Reviewed-by: Simon Horman Tested-by: Avigail Dahan Signed-off-by: Tony Nguyen --- drivers/net/ethernet/intel/igc/igc.h | 3 +++ drivers/net/ethernet/intel/igc/igc_ethtool.c | 20 ++++++++++++++++++++ drivers/net/ethernet/intel/igc/igc_main.c | 8 ++++---- 3 files changed, 27 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/intel/igc/igc.h index caa5b89b2b24..e66799507f81 100644 --- a/drivers/net/ethernet/intel/igc/igc.h +++ b/drivers/net/ethernet/intel/igc/igc.h @@ -30,6 +30,7 @@ void igc_ethtool_set_ops(struct net_device *); #define MAX_ETYPE_FILTER 8 #define IGC_RETA_SIZE 128 +#define IGC_RSS_KEY_SIZE 40 /* SDP support */ #define IGC_N_EXTTS 2 @@ -302,6 +303,7 @@ struct igc_adapter { unsigned int nfc_rule_count; u8 rss_indir_tbl[IGC_RETA_SIZE]; + u8 rss_key[IGC_RSS_KEY_SIZE]; unsigned long link_check_timeout; struct igc_info ei; @@ -360,6 +362,7 @@ unsigned int igc_get_max_rss_queues(struct igc_adapter *adapter); void igc_set_flag_queue_pairs(struct igc_adapter *adapter, const u32 max_rss_queues); int igc_reinit_queues(struct igc_adapter *adapter); +void igc_write_rss_key(struct igc_adapter *adapter); void igc_write_rss_indir_tbl(struct igc_adapter *adapter); bool igc_has_link(struct igc_adapter *adapter); void igc_reset(struct igc_adapter *adapter); diff --git a/drivers/net/ethernet/intel/igc/igc_ethtool.c b/drivers/net/ethernet/intel/igc/igc_ethtool.c index 4d1bcc19255f..c2300232c8b1 100644 --- a/drivers/net/ethernet/intel/igc/igc_ethtool.c +++ b/drivers/net/ethernet/intel/igc/igc_ethtool.c @@ -1460,6 +1460,26 @@ static int igc_ethtool_set_rxnfc(struct net_device *dev, } } +/** + * igc_write_rss_key - Program the RSS key into device registers + * @adapter: board private structure + * + * Write the RSS key stored in adapter->rss_key to the IGC_RSSRK registers. + * Each 32-bit chunk of the key is read using get_unaligned_le32() and written + * to the appropriate register. + */ +void igc_write_rss_key(struct igc_adapter *adapter) +{ + struct igc_hw *hw = &adapter->hw; + u32 val; + int i; + + for (i = 0; i < IGC_RSS_KEY_SIZE / 4; i++) { + val = get_unaligned_le32(&adapter->rss_key[i * 4]); + wr32(IGC_RSSRK(i), val); + } +} + void igc_write_rss_indir_tbl(struct igc_adapter *adapter) { struct igc_hw *hw = &adapter->hw; diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c index 80a90ce0ad0e..ebd831a4ff53 100644 --- a/drivers/net/ethernet/intel/igc/igc_main.c +++ b/drivers/net/ethernet/intel/igc/igc_main.c @@ -785,11 +785,8 @@ static void igc_setup_mrqc(struct igc_adapter *adapter) struct igc_hw *hw = &adapter->hw; u32 j, num_rx_queues; u32 mrqc, rxcsum; - u32 rss_key[10]; - netdev_rss_key_fill(rss_key, sizeof(rss_key)); - for (j = 0; j < 10; j++) - wr32(IGC_RSSRK(j), rss_key[j]); + igc_write_rss_key(adapter); num_rx_queues = adapter->rss_queues; @@ -5048,6 +5045,9 @@ static int igc_sw_init(struct igc_adapter *adapter) pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word); + /* init RSS key */ + netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key)); + /* set default ring sizes */ adapter->tx_ring_count = IGC_DEFAULT_TXD; adapter->rx_ring_count = IGC_DEFAULT_RXD; -- 2.47.1