From: kernel test robot <lkp@intel.com>
To: alejandro.lucero-palau@amd.com, linux-cxl@vger.kernel.org,
netdev@vger.kernel.org, dave.jiang@intel.com,
dan.j.williams@intel.com, edward.cree@amd.com,
davem@davemloft.net, kuba@kernel.org, pabeni@redhat.com,
edumazet@google.com
Cc: oe-kbuild-all@lists.linux.dev,
Alejandro Lucero <alucerop@amd.com>,
Martin Habets <habetsm.xilinx@gmail.com>,
Fan Ni <fan.ni@samsung.com>, Edward Cree <ecree.xilinx@gmail.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>
Subject: Re: [PATCH v25 05/11] sfc: create type2 cxl memdev
Date: Wed, 1 Apr 2026 00:47:35 +0800 [thread overview]
Message-ID: <202604010047.zovyb3Z0-lkp@intel.com> (raw)
In-Reply-To: <20260330143827.1278677-6-alejandro.lucero-palau@amd.com>
Hi,
kernel test robot noticed the following build errors:
[auto build test ERROR on 64584273dfb8a1e5fc7d78094ba22a93c204b44e]
url: https://github.com/intel-lab-lkp/linux/commits/alejandro-lucero-palau-amd-com/sfc-add-cxl-support/20260331-055820
base: 64584273dfb8a1e5fc7d78094ba22a93c204b44e
patch link: https://lore.kernel.org/r/20260330143827.1278677-6-alejandro.lucero-palau%40amd.com
patch subject: [PATCH v25 05/11] sfc: create type2 cxl memdev
config: x86_64-randconfig-003-20260331 (https://download.01.org/0day-ci/archive/20260401/202604010047.zovyb3Z0-lkp@intel.com/config)
compiler: gcc-14 (Debian 14.2.0-19) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260401/202604010047.zovyb3Z0-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202604010047.zovyb3Z0-lkp@intel.com/
All errors (new ones prefixed by >>):
ld: vmlinux.o: in function `efx_cxl_init':
>> drivers/net/ethernet/sfc/efx_cxl.c:78:(.text+0xd33fcd): undefined reference to `devm_cxl_add_memdev'
vim +78 drivers/net/ethernet/sfc/efx_cxl.c
16
17 int efx_cxl_init(struct efx_probe_data *probe_data)
18 {
19 struct efx_nic *efx = &probe_data->efx;
20 struct pci_dev *pci_dev = efx->pci_dev;
21 struct efx_cxl *cxl;
22 u16 dvsec;
23 int rc;
24
25 probe_data->cxl_pio_initialised = false;
26
27 /* Is the device configured with and using CXL? */
28 if (!pcie_is_cxl(pci_dev))
29 return 0;
30
31 dvsec = pci_find_dvsec_capability(pci_dev, PCI_VENDOR_ID_CXL,
32 PCI_DVSEC_CXL_DEVICE);
33 if (!dvsec) {
34 pci_info(pci_dev, "CXL_DVSEC_PCIE_DEVICE capability not found\n");
35 return 0;
36 }
37
38 pci_dbg(pci_dev, "CXL_DVSEC_PCIE_DEVICE capability found\n");
39
40 /* Create a cxl_dev_state embedded in the cxl struct using cxl core api
41 * specifying no mbox available.
42 */
43 cxl = devm_cxl_dev_state_create(&pci_dev->dev, CXL_DEVTYPE_DEVMEM,
44 pci_dev->dev.id, dvsec, struct efx_cxl,
45 cxlds, false);
46
47 if (!cxl)
48 return -ENOMEM;
49
50 rc = cxl_pci_setup_regs(pci_dev, CXL_REGLOC_RBI_COMPONENT,
51 &cxl->cxlds.reg_map);
52 if (rc) {
53 pci_err(pci_dev, "No component registers\n");
54 return rc;
55 }
56
57 if (!cxl->cxlds.reg_map.component_map.hdm_decoder.valid) {
58 pci_err(pci_dev, "Expected HDM component register not found\n");
59 return -ENODEV;
60 }
61
62 if (!cxl->cxlds.reg_map.component_map.ras.valid) {
63 pci_err(pci_dev, "Expected RAS component register not found\n");
64 return -ENODEV;
65 }
66
67 /* Set media ready explicitly as there are neither mailbox for checking
68 * this state nor the CXL register involved, both not mandatory for
69 * type2.
70 */
71 cxl->cxlds.media_ready = true;
72
73 if (cxl_set_capacity(&cxl->cxlds, EFX_CTPIO_BUFFER_SIZE)) {
74 pci_err(pci_dev, "dpa capacity setup failed\n");
75 return -ENODEV;
76 }
77
> 78 cxl->cxlmd = devm_cxl_add_memdev(&cxl->cxlds, NULL);
79 if (IS_ERR(cxl->cxlmd)) {
80 pci_err(pci_dev, "CXL accel memdev creation failed");
81 return PTR_ERR(cxl->cxlmd);
82 }
83
84 probe_data->cxl = cxl;
85
86 return 0;
87 }
88
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
next prev parent reply other threads:[~2026-03-31 16:48 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-30 14:38 [PATCH v25 00/11] Type2 device basic support alejandro.lucero-palau
2026-03-30 14:38 ` [PATCH v25 01/11] sfc: add cxl support alejandro.lucero-palau
2026-03-31 3:37 ` Dan Williams
2026-03-30 14:38 ` [PATCH v25 02/11] cxl/sfc: Map cxl regs alejandro.lucero-palau
2026-03-30 14:38 ` [PATCH v25 03/11] cxl/sfc: Initialize dpa without a mailbox alejandro.lucero-palau
2026-03-30 14:38 ` [PATCH v25 04/11] cxl: Prepare memdev creation for type2 alejandro.lucero-palau
2026-03-31 3:46 ` Dan Williams
2026-03-30 14:38 ` [PATCH v25 05/11] sfc: create type2 cxl memdev alejandro.lucero-palau
2026-03-31 16:47 ` kernel test robot [this message]
2026-04-01 5:17 ` Dan Williams
2026-04-01 10:16 ` Alejandro Lucero Palau
2026-04-01 21:53 ` Dan Williams
2026-04-02 6:30 ` Alejandro Lucero Palau
2026-04-02 18:32 ` Dan Williams
2026-03-30 14:38 ` [PATCH v25 06/11] cxl/hdm: Add support for getting region from committed decoder alejandro.lucero-palau
2026-04-01 5:18 ` Dan Williams
2026-03-30 14:38 ` [PATCH v25 07/11] cxl: Add function for obtaining region range alejandro.lucero-palau
2026-04-01 5:20 ` Dan Williams
2026-03-30 14:38 ` [PATCH v25 08/11] cxl: Export function for unwinding cxl by accelerators alejandro.lucero-palau
2026-04-01 5:21 ` Dan Williams
2026-03-30 14:38 ` [PATCH v25 09/11] sfc: obtain decoder and region if committed by firmware alejandro.lucero-palau
2026-03-31 16:23 ` kernel test robot
2026-03-30 14:38 ` [PATCH v25 10/11] cxl: Avoid dax creation for accelerators alejandro.lucero-palau
2026-04-01 5:27 ` Dan Williams
2026-03-30 14:38 ` [PATCH v25 11/11] sfc: support pio mapping based on cxl alejandro.lucero-palau
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