From: Changhuang Liang <changhuang.liang@starfivetech.com>
To: Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Stephen Boyd <sboyd@kernel.org>, Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Philipp Zabel <p.zabel@pengutronix.de>,
Emil Renner Berthing <kernel@esmil.dk>,
Kees Cook <kees@kernel.org>,
"Gustavo A . R . Silva" <gustavoars@kernel.org>,
Richard Cochran <richardcochran@gmail.com>
Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-hardening@vger.kernel.org, netdev@vger.kernel.org,
Sia Jee Heng <jeeheng.sia@starfivetech.com>,
Hal Feng <hal.feng@starfivetech.com>,
Ley Foon Tan <leyfoon.tan@starfivetech.com>,
Changhuang Liang <changhuang.liang@starfivetech.com>
Subject: [PATCH v1 17/22] dt-bindings: clock: Add StarFive JHB100 Peripheral-2 clock and reset generator
Date: Thu, 2 Apr 2026 03:55:18 -0700 [thread overview]
Message-ID: <20260402105523.447523-18-changhuang.liang@starfivetech.com> (raw)
In-Reply-To: <20260402105523.447523-1-changhuang.liang@starfivetech.com>
Add bindings for the Peripheral-2 clock and reset generator (PER2CRG)
on the JHB100 RISC-V SoC by StarFive Ltd.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
---
.../clock/starfive,jhb100-per2crg.yaml | 79 +++++++++++++++++++
.../dt-bindings/clock/starfive,jhb100-crg.h | 57 +++++++++++++
.../dt-bindings/reset/starfive,jhb100-crg.h | 18 +++++
3 files changed, 154 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/starfive,jhb100-per2crg.yaml
diff --git a/Documentation/devicetree/bindings/clock/starfive,jhb100-per2crg.yaml b/Documentation/devicetree/bindings/clock/starfive,jhb100-per2crg.yaml
new file mode 100644
index 000000000000..04b2fa97011a
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/starfive,jhb100-per2crg.yaml
@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/starfive,jhb100-per2crg.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JHB100 Peripheral-2 Clock and Reset Generator
+
+maintainers:
+ - Changhuang Liang <changhuang.liang@starfivetech.com>
+
+properties:
+ compatible:
+ const: starfive,jhb100-per2crg
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Peripheral-2 600MHz
+ - description: Peripheral-2 400MHz
+ - description: Peripheral-2 125MHz
+ - description: Peripheral-2 GMAC2 RGMII RX
+ - description: Peripheral-2 GMAC2 RMII Reference
+ - description: Peripheral-2 GMAC3 SGMII TX
+ - description: Peripheral-2 GMAC3 SGMII RX
+ - description: Main Oscillator (25 MHz)
+
+ clock-names:
+ items:
+ - const: per2_600
+ - const: per2_400
+ - const: per2_125
+ - const: per2_gmac2_rgmii_rx
+ - const: per2_gmac2_rmii_ref
+ - const: per2_gmac3_sgmii_tx
+ - const: per2_gmac3_sgmii_rx
+ - const: osc
+
+
+ '#clock-cells':
+ const: 1
+ description:
+ See <dt-bindings/clock/starfive,jhb100-crg.h> for valid indices.
+
+ '#reset-cells':
+ const: 1
+ description:
+ See <dt-bindings/reset/starfive-jhb100-crg.h> for valid indices.
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - '#clock-cells'
+ - '#reset-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ clock-controller@11bc0000 {
+ compatible = "starfive,jhb100-per2crg";
+ reg = <0x11bc0000 0x1000>;
+ clocks = <&sys0crg 52>, <&sys0crg 54>, <&sys0crg 55>,
+ <&per2_gmac2_rgmii_rx>, <&per2_gmac2_rmii_ref>,
+ <&per2_gmac3_sgmii_tx>, <&per2_gmac3_sgmii_rx>,
+ <&osc>;
+ clock-names = "per2_600", "per2_400", "per2_125",
+ "per2_gmac2_rgmii_rx",
+ "per2_gmac2_rmii_ref",
+ "per2_gmac3_sgmii_tx",
+ "per2_gmac3_sgmii_rx",
+ "osc";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
diff --git a/include/dt-bindings/clock/starfive,jhb100-crg.h b/include/dt-bindings/clock/starfive,jhb100-crg.h
index 95345d104585..2ab505437118 100644
--- a/include/dt-bindings/clock/starfive,jhb100-crg.h
+++ b/include/dt-bindings/clock/starfive,jhb100-crg.h
@@ -447,4 +447,61 @@
#define JHB100_PER1CLK_MAIN_ICG_EN_RAS 75
#define JHB100_PER1CLK_MAIN_ICG_EN_UFS 76
+/* PER2CRG clocks */
+#define JHB100_PER2CLK_300 0
+#define JHB100_PER2CLK_100 1
+#define JHB100_PER2CLK_50 2
+#define JHB100_PER2CLK_GMAC2_RMII_50 3
+#define JHB100_PER2CLK_CAN0_CORE_DIV 4
+#define JHB100_PER2CLK_CAN1_CORE_DIV 5
+#define JHB100_PER2CLK_CAN0_TIMER 6
+#define JHB100_PER2CLK_CAN1_TIMER 7
+
+#define JHB100_PER2CLK_RTC_CORE_DIV 11
+#define JHB100_PER2CLK_GMAC2_RMII_MUX_DLY 12
+#define JHB100_PER2CLK_GMAC2_RMII_DIV 13
+
+#define JHB100_PER2CLK_GMAC2_RGMII_125_MUX 15
+#define JHB100_PER2CLK_GMAC2_RGMII_DIV 16
+#define JHB100_PER2CLK_GMAC2_TX_MUX 17
+#define JHB100_PER2CLK_GMAC2_TX_180_BUF 18
+#define JHB100_PER2CLK_GMAC2_RX_MUX_DLY 19
+#define JHB100_PER2CLK_GMAC2_RX_180_BUF 20
+#define JHB100_PER2CLK_GMAC2_TXCK_MUX_DLY 21
+#define JHB100_PER2CLK_GMAC3_TX_125_MUX 22
+#define JHB100_PER2CLK_GMAC3_RX_125_MUX 23
+#define JHB100_PER2CLK_GMAC3_TX_DIV 24
+#define JHB100_PER2CLK_GMAC3_RX_DIV 25
+#define JHB100_PER2CLK_SENSORS_PERIPH2 26
+
+#define JHB100_PER2CLK_FAN_TACH_PCLK 33
+
+#define JHB100_PER2CLK_ETHER0_RMIIANDRGMII_TX_I 44
+#define JHB100_PER2CLK_ETHER0_RMIIANDRGMII_RX_I 45
+#define JHB100_PER2CLK_ETHER0_RMIIANDRGMII_TX_180_I 46
+#define JHB100_PER2CLK_ETHER0_RMIIANDRGMII_RX_180_I 47
+#define JHB100_PER2CLK_ETHER0_RMIIANDRGMII_PTP_REF_I 48
+#define JHB100_PER2CLK_ETHER0_RMIIANDRGMII_RMII_I 49
+#define JHB100_PER2CLK_ETHER0_RMIIANDRGMII_CSR_I 50
+#define JHB100_PER2CLK_ETHER0_RMIIANDRGMII_ACLK_I 51
+#define JHB100_PER2CLK_RMIIANDRGMII_IOMUX_GMAC2_TXCK 52
+#define JHB100_PER2CLK_ETHER1_SGMII_TX_I 53
+#define JHB100_PER2CLK_ETHER1_SGMII_RX_I 54
+#define JHB100_PER2CLK_ETHER1_SGMII_TX_125_I 55
+#define JHB100_PER2CLK_ETHER1_SGMII_RX_125_I 56
+#define JHB100_PER2CLK_ETHER1_SGMII_PTP_REF_I 57
+#define JHB100_PER2CLK_ETHER1_SGMII_CSR_I 58
+#define JHB100_PER2CLK_ETHER1_SGMII_ACLK_I 59
+#define JHB100_PER2CLK_ETHER1_SGMII_PHY_PCLK_I 60
+#define JHB100_PER2CLK_ETHER1_SGMII_REF_25_I 61
+#define JHB100_PER2CLK_MAIN_ICG_EN_CAN0 62
+#define JHB100_PER2CLK_MAIN_ICG_EN_CAN1 63
+
+#define JHB100_PER2CLK_MAIN_ICG_EN_DMAC_8CH 65
+#define JHB100_PER2CLK_MAIN_ICG_EN_RTC_SCAN 66
+#define JHB100_PER2CLK_MAIN_ICG_EN_ADC0 67
+#define JHB100_PER2CLK_MAIN_ICG_EN_ADC1 68
+#define JHB100_PER2CLK_MAIN_ICG_EN_GMAC2 69
+#define JHB100_PER2CLK_MAIN_ICG_EN_GMAC3 70
+
#endif /* __DT_BINDINGS_CLOCK_STARFIVE_JHB100_H__ */
diff --git a/include/dt-bindings/reset/starfive,jhb100-crg.h b/include/dt-bindings/reset/starfive,jhb100-crg.h
index 57977d5b4018..102af1042903 100644
--- a/include/dt-bindings/reset/starfive,jhb100-crg.h
+++ b/include/dt-bindings/reset/starfive,jhb100-crg.h
@@ -163,4 +163,22 @@
#define JHB100_PER1RST_MAIN_RSTN_DMAC_SPI0 16
#define JHB100_PER1RST_MAIN_RSTN_PERIPH1_RAS 17
+/* PER2CRG resets */
+#define JHB100_PER2RST_IOMUX_PRESETN 0
+#define JHB100_PER2RST_POK_IOMUX_PRESETN 1
+#define JHB100_PER2RST_SYSREG_RSTN 2
+#define JHB100_PER2RST_MAIN_RSTN_CAN0 3
+#define JHB100_PER2RST_MAIN_RSTN_CAN1 4
+#define JHB100_PER2RST_FAN_TACH_PRESETN 5
+
+#define JHB100_PER2RST_MAIN_RSTN_GMAC2 7
+#define JHB100_PER2RST_MAIN_RSTN_GMAC3 8
+#define JHB100_PER2RST_MAIN_RSTN_DMAC_8CH 9
+#define JHB100_PER2RST_MAIN_RSTN_RTC 10
+#define JHB100_PER2RST_ADC0_PRESETN 11
+#define JHB100_PER2RST_ADC0_IOMUX_PRESETN 12
+#define JHB100_PER2RST_ADC1_PRESETN 13
+#define JHB100_PER2RST_ADC1_IOMUX_PRESETN 14
+#define JHB100_PER2RST_MAIN_RSTN_PERIPH2_SENSORS 15
+
#endif /* __DT_BINDINGS_RESET_STARFIVE_JHB100_CRG_H__ */
--
2.25.1
next prev parent reply other threads:[~2026-04-02 12:30 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-02 10:55 [PATCH v1 00/22] Add basic clocks and resets for JHB100 SoC Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 01/22] reset: starfive: Rename file name "jh71x0" to "common" Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 02/22] reset: starfive: Convert the word "jh71x0" to "starfive" Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 03/22] clk: starfive: Rename file name "jh71x0" to "common" Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 04/22] clk: starfive: Convert the word "jh71x0" to "starfive" Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 05/22] dt-bindings: clock: Add StarFive JHB100 System-0 clock and reset generator Changhuang Liang
2026-04-02 12:22 ` Philipp Zabel
2026-04-03 0:53 ` Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 06/22] clk: starfive: Add JHB100 System-0 clock generator driver Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 07/22] dt-bindings: clock: Add StarFive JHB100 System-1 clock and reset generator Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 08/22] clk: starfive: Add JHB100 System-1 clock generator driver Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 09/22] dt-bindings: clock: Add StarFive JHB100 System-2 clock and reset generator Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 10/22] clk: starfive: Add JHB100 System-2 clock generator driver Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 11/22] dt-bindings: clock: Add StarFive JHB100 Peripheral-0 clock and reset generator Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 12/22] clk: starfive: Introduce inverter and divider Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 13/22] clk: starfive: Expand the storage of clock parent index Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 14/22] clk: starfive: Add StarFive JHB100 Peripheral-0 clock driver Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 15/22] dt-bindings: clock: Add StarFive JHB100 Peripheral-1 clock and reset generator Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 16/22] clk: starfive: Add StarFive JHB100 Peripheral-1 clock driver Changhuang Liang
2026-04-02 10:55 ` Changhuang Liang [this message]
2026-04-04 11:34 ` [PATCH v1 17/22] dt-bindings: clock: Add StarFive JHB100 Peripheral-2 clock and reset generator Krzysztof Kozlowski
2026-04-07 1:37 ` Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 18/22] clk: starfive: Add StarFive JHB100 Peripheral-2 clock driver Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 19/22] dt-bindings: clock: Add StarFive JHB100 Peripheral-3 clock and reset generator Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 20/22] clk: starfive: Add StarFive JHB100 Peripheral-3 clock driver Changhuang Liang
2026-04-02 10:55 ` [PATCH v1 21/22] reset: starfive: Add StarFive JHB100 reset driver Changhuang Liang
2026-04-02 12:23 ` Philipp Zabel
2026-04-02 10:55 ` [PATCH v1 22/22] riscv: dts: starfive: jhb100: Add clocks and resets nodes Changhuang Liang
2026-04-02 12:14 ` Conor Dooley
2026-04-03 1:07 ` Changhuang Liang
2026-04-03 14:03 ` Conor Dooley
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