From: Rob Herring <robh@kernel.org>
To: Ivan Vecera <ivecera@redhat.com>
Cc: netdev@vger.kernel.org, Petr Oros <poros@redhat.com>,
Prathosh Satish <Prathosh.Satish@microchip.com>,
Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
Jiri Pirko <jiri@resnulli.us>,
Michal Schmidt <mschmidt@redhat.com>,
Simon Horman <horms@kernel.org>,
Vadim Fedorenko <vadim.fedorenko@linux.dev>,
linux-kernel@vger.kernel.org, Conor Dooley <conor+dt@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
devicetree@vger.kernel.org, Pasi Vaananen <pvaanane@redhat.com>
Subject: Re: [PATCH net-next v2 4/5] dt-bindings: dpll: add ref-sync-sources property
Date: Tue, 7 Apr 2026 15:18:49 -0500 [thread overview]
Message-ID: <20260407201849.GA3618101-robh@kernel.org> (raw)
In-Reply-To: <20260328080624.593916-5-ivecera@redhat.com>
On Sat, Mar 28, 2026 at 09:06:23AM +0100, Ivan Vecera wrote:
> Add ref-sync-sources phandle-array property to the dpll-pin schema
> allowing board designers to declare which input pins can serve as
> sync sources in a Reference-Sync pair. A Ref-Sync pair consists of
> a clock reference and a low-frequency sync signal where the DPLL locks
> to the clock but phase-aligns to the sync reference.
>
> Update both examples in the Microchip ZL3073x binding to demonstrate
> the new property with a 1 PPS sync source paired to a clock source.
>
> Reviewed-by: Petr Oros <poros@redhat.com>
> Reviewed-by: Prathosh Satish <Prathosh.Satish@microchip.com>
> Signed-off-by: Ivan Vecera <ivecera@redhat.com>
> ---
> .../devicetree/bindings/dpll/dpll-pin.yaml | 11 +++++++
> .../bindings/dpll/microchip,zl30731.yaml | 30 ++++++++++++++-----
> 2 files changed, 34 insertions(+), 7 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/dpll/dpll-pin.yaml b/Documentation/devicetree/bindings/dpll/dpll-pin.yaml
> index 51db93b77306f..7084f102e274c 100644
> --- a/Documentation/devicetree/bindings/dpll/dpll-pin.yaml
> +++ b/Documentation/devicetree/bindings/dpll/dpll-pin.yaml
> @@ -36,6 +36,17 @@ properties:
> description: String exposed as the pin board label
> $ref: /schemas/types.yaml#/definitions/string
>
> + ref-sync-sources:
> + description: |
> + List of phandles to input pins that can serve as the sync source
> + in a Reference-Sync pair with this pin acting as the clock source.
> + A Ref-Sync pair consists of a clock reference and a low-frequency
> + sync signal. The DPLL locks to the clock reference but
> + phase-aligns to the sync reference.
> + Only valid for input pins. Each referenced pin must be a
> + different input pin on the same device.
> + $ref: /schemas/types.yaml#/definitions/phandle-array
phandle-array is really a matrix. As there are no arg cells here, for
a list of phandles you need:
items:
maxItems: 1
With that,
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Rob
next prev parent reply other threads:[~2026-04-07 20:18 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-28 8:06 [PATCH net-next v2 0/5] dpll: zl3073x: add ref-sync pair support Ivan Vecera
2026-03-28 8:06 ` [PATCH net-next v2 1/5] dpll: zl3073x: clean up esync get/set and use zl3073x_out_is_ndiv() Ivan Vecera
2026-03-28 8:06 ` [PATCH net-next v2 2/5] dpll: zl3073x: use FIELD_MODIFY() for clear-and-set patterns Ivan Vecera
2026-03-28 8:06 ` [PATCH net-next v2 3/5] dpll: zl3073x: add ref sync and output clock type helpers Ivan Vecera
2026-03-28 8:06 ` [PATCH net-next v2 4/5] dt-bindings: dpll: add ref-sync-sources property Ivan Vecera
2026-04-07 20:18 ` Rob Herring [this message]
2026-03-28 8:06 ` [PATCH net-next v2 5/5] dpll: zl3073x: add ref-sync pair support Ivan Vecera
2026-04-06 15:30 ` [PATCH net-next v2 0/5] " Jakub Kicinski
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