From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B05023DC4BC for ; Wed, 22 Apr 2026 12:35:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776861355; cv=none; b=dfmd8LBTq0lhcC36tAZh/gg/GsE3W8YgOAfOsax+Qp/n5QJnYflSri47eZOacAPnIW8/2MXdTsb0D2QM7eBoaZJgKqEX9uykB5S5abJ42ERfnCcbb8QRceXqpQYD4bABrX8lD4CpRRaCGqx/m3JBK8xkE2XO+mILijCvOS2fRDg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776861355; c=relaxed/simple; bh=dfDAicP/XUpFlFpPbHueZb36ts8STy9ge9syiUh7sgQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Kn8VqeyVOHOi2H3V0XET/eF1X68CDjGCKffkeyhITzz/2pYMw9TG9j10yNkL7a8f/VzJZuS39FXSBwFFG+7LO4pvBSPSSoubHfsssGnp59MKqKNgFG/nByAekjvU2OvTplk5DOhoHRGKdgZBTrHuOivY9Gxsbx7Gg8Of3rv6IQY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=LOYUKqT6; arc=none smtp.client-ip=198.175.65.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="LOYUKqT6" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1776861353; x=1808397353; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dfDAicP/XUpFlFpPbHueZb36ts8STy9ge9syiUh7sgQ=; b=LOYUKqT68jDTvX/GSw2lpdgyWsYbdUV3PYp8GHat5NOsACd2cET+yKJV wkySfeF16NkiYI9OI0n5OgBn+LjvQ0ZFWs4/UXQtlpUN0ak14Eq6Aa88B MbboUu2RNZhDyYt+7o+FZ+fMMxK8IYM99YMsbCJCVPf3mqWILZIM1kQD2 sVMIkdHBT4in2KNnGR/AA+WHIMwWaqyRnCyuPWSedIHV3yVkHFI0U+UAO gVpH2NKJDUciNKFqULsBBUdVhyqgETHhOrCNtG2j1qQQ1wwDNAKljP3H1 ERkL20YPrRabMYYOfaCAzHc2RsDU9saLzsJcgfBu4fY/z43YBxHMMYHIY A==; X-CSE-ConnectionGUID: 6zkAdUMWTGahqK/DC0jpXA== X-CSE-MsgGUID: pRbHgul1Tc2jy+QEQkkxnw== X-IronPort-AV: E=McAfee;i="6800,10657,11764"; a="77826160" X-IronPort-AV: E=Sophos;i="6.23,192,1770624000"; d="scan'208";a="77826160" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Apr 2026 05:35:51 -0700 X-CSE-ConnectionGUID: 8BLrhsojRN2Vwhg1bkaKJQ== X-CSE-MsgGUID: eEEtCP66TeS8G38XyhnfBw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,192,1770624000"; d="scan'208";a="229167432" Received: from gklab-003-001.igk.intel.com ([10.91.173.48]) by fmviesa007.fm.intel.com with ESMTP; 22 Apr 2026 05:35:50 -0700 From: Grzegorz Nitka To: intel-wired-lan@lists.osuosl.org Cc: netdev@vger.kernel.org, anthony.l.nguyen@intel.com, przemyslaw.kitszel@intel.com, Grzegorz Nitka , Arkadiusz Kubalewski Subject: [PATCH iwl-net 1/2] ice: ptp: serialize E825 PHY timer start with PTP lock Date: Wed, 22 Apr 2026 14:31:43 +0200 Message-Id: <20260422123144.485930-2-grzegorz.nitka@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260422123144.485930-1-grzegorz.nitka@intel.com> References: <20260422123144.485930-1-grzegorz.nitka@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit ice_start_phy_timer_eth56g() programs TIMETUS registers and issues INIT_INCVAL without holding the global PTP semaphore. This allows concurrent PTP command paths to interleave with PHY timer start, which can make the sequence fail and leave timer initialization inconsistent. Take the PTP lock around TIMETUS registers programming and INIT_INCVAL command execution, and make sure the lock is released on all error paths. Keep the subsequent sync step outside of this critical section, since ice_sync_phy_timer_eth56g() takes the same semaphore internally. Fixes: 7cab44f1c35f ("ice: Introduce ETH56G PHY model for E825C products") Reviewed-by: Arkadiusz Kubalewski Signed-off-by: Grzegorz Nitka --- drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c index 672218e5d1f9..8bb94e785f2a 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c @@ -2141,16 +2141,23 @@ int ice_start_phy_timer_eth56g(struct ice_hw *hw, u8 port) } incval = (u64)hi << 32 | lo; + if (!ice_ptp_lock(hw)) { + dev_err(ice_hw_to_dev(hw), "Failed to acquire PTP semaphore\n"); + return -EBUSY; + } + err = ice_write_40b_ptp_reg_eth56g(hw, port, PHY_REG_TIMETUS_L, incval); if (err) - return err; + goto err_ptp_unlock; err = ice_ptp_one_port_cmd(hw, port, ICE_PTP_INIT_INCVAL); if (err) - return err; + goto err_ptp_unlock; ice_ptp_exec_tmr_cmd(hw); + ice_ptp_unlock(hw); + err = ice_sync_phy_timer_eth56g(hw, port); if (err) return err; @@ -2166,6 +2173,10 @@ int ice_start_phy_timer_eth56g(struct ice_hw *hw, u8 port) ice_debug(hw, ICE_DBG_PTP, "Enabled clock on PHY port %u\n", port); return 0; + +err_ptp_unlock: + ice_ptp_unlock(hw); + return err; } /** -- 2.39.3