From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 583FA3A5451; Thu, 30 Apr 2026 09:47:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.12 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777542426; cv=none; b=gvpnWuaGTh8qwdOiFLkPxLNEChUExCUsqpVA6+dixoa0oLNqQURRaTSESUSWIusTRvCuWnmdHiIOGLfh1zzDdgEnaOxKTMVw9uzXGT1bL2amkcaxuRtoUBkHIfBYUIGi6aOjgK1TA/qWCygqafjXTuyfoM2Swltci+L/lf0mylM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777542426; c=relaxed/simple; bh=Izbqb6M5jnyKGkCx6C0FAG3R4OV2Dm01nNdm0f5hBzY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=OPaiE0QY3SZ6VtruJDSvgMwWK7aQDu1figI29mn+FjOrVcQiFvLdaUYwa3b1zUKHXFtLPCmnjuY4Pno775BpDgnR1VQ2w7oJCPNdEArwws0ZED0y/gqYgp0bOkMlmvItgl8j5Ni+OQka5Vit6bysIIZZQpv+PjSfxzxBUsDnHh8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=MQp9nWW7; arc=none smtp.client-ip=192.198.163.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="MQp9nWW7" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1777542426; x=1809078426; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Izbqb6M5jnyKGkCx6C0FAG3R4OV2Dm01nNdm0f5hBzY=; b=MQp9nWW7Wv88mi9JasAumVZt+lQZB56QSCrj73tAyJrpPFHtBls14L+V 8tylreJyG1woCAXFEQteAS9EFrQ7pByToSqygXx5lQolK90xMR3sNEVYe zV+AfEmzd7jaHYffAHyl8HXige6QywjgQTuqsx2KWZdIUrOc41PfWtqGx eXvJu+g5XW1SaR9PbJGOFV3nXUsdRQNvUoMCc5rFke+LQ1py2zE2kbnj/ hferBVjytDiTr+XpGpg4cRNeeZVY3tYcl24r2OTWssSKD7thDd7OPlmte lzWdqgX+LAoBaNSgI+L16GlExWgnQt7Y1aSqNKsB2akiyNIorWBiReQSO A==; X-CSE-ConnectionGUID: mosE6w8QQA2DvP0UU6HLZw== X-CSE-MsgGUID: 5roDnJkpSwKur91GoGoTFw== X-IronPort-AV: E=McAfee;i="6800,10657,11771"; a="82342625" X-IronPort-AV: E=Sophos;i="6.23,207,1770624000"; d="scan'208";a="82342625" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2026 02:47:05 -0700 X-CSE-ConnectionGUID: YDM0RgezS5mWg0CQ3CzroA== X-CSE-MsgGUID: 0fQywAatQ/OAmuu4OpLNaA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,207,1770624000"; d="scan'208";a="272649791" Received: from gklab-003-001.igk.intel.com ([10.91.173.48]) by orviesa001.jf.intel.com with ESMTP; 30 Apr 2026 02:47:00 -0700 From: Grzegorz Nitka To: netdev@vger.kernel.org Cc: linux-kernel@vger.kernel.org, intel-wired-lan@lists.osuosl.org, poros@redhat.com, richardcochran@gmail.com, andrew+netdev@lunn.ch, przemyslaw.kitszel@intel.com, anthony.l.nguyen@intel.com, Prathosh.Satish@microchip.com, ivecera@redhat.com, jiri@resnulli.us, arkadiusz.kubalewski@intel.com, vadim.fedorenko@linux.dev, donald.hunter@gmail.com, horms@kernel.org, pabeni@redhat.com, kuba@kernel.org, davem@davemloft.net, edumazet@google.com, Grzegorz Nitka , Aleksandr Loktionov Subject: [PATCH v7 net-next 4/8] dpll: zl3073x: allow SyncE_Ref pin state change Date: Thu, 30 Apr 2026 11:42:34 +0200 Message-Id: <20260430094238.987976-5-grzegorz.nitka@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260430094238.987976-1-grzegorz.nitka@intel.com> References: <20260430094238.987976-1-grzegorz.nitka@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The SyncE_Ref pin may operate as either an active or inactive reference depending on board design and system configuration. Some platforms need to disable the SyncE reference dynamically (e.g., when selecting a different recovered clock input). The hardware supports toggling this pin, therefore advertise the STATE_CAN_CHANGE capability. Reviewed-by: Arkadiusz Kubalewski Reviewed-by: Aleksandr Loktionov Signed-off-by: Grzegorz Nitka --- drivers/dpll/zl3073x/prop.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/dpll/zl3073x/prop.c b/drivers/dpll/zl3073x/prop.c index ac9d41d0f978..acd7061a741a 100644 --- a/drivers/dpll/zl3073x/prop.c +++ b/drivers/dpll/zl3073x/prop.c @@ -215,6 +215,15 @@ struct zl3073x_pin_props *zl3073x_pin_props_get(struct zl3073x_dev *zldev, props->dpll_props.type = DPLL_PIN_TYPE_GNSS; + /* + * The SyncE_Ref pin supports enabling/disabling dynamically. + * Some platforms may choose to expose this through firmware + * configuration later. For now, advertise this capability + * universally since the hardware allows state toggling. + */ + props->dpll_props.capabilities |= + DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE; + /* The output pin phase adjustment granularity equals half of * the synth frequency count. */ -- 2.39.3