From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 04F503E3146; Mon, 4 May 2026 14:24:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777904667; cv=none; b=PfYn43jB24/51QypPxLQ6Y8QXj7OeXAf8u6xWtsPXDy20cmf5BjeYZCvyrMAiYK8WNgN3efV58AR5dFpl7WpyzAmiveVuEFYDUkKtXRsrB5EiSwTN4d9RELgSssSO4RSc7jL+1257UpDhZYwgmN7AaydtWM+yUE4urS6XZUcaPQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777904667; c=relaxed/simple; bh=wGxs+F/+5Vrhuyz2y5uEWLeuFrAw1YPbFSMnjR0PIic=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=Xn+K1XI298eUzeckGm4QiFa1XfUAGNOCfkFSnRyX8zTIiB7KCMkOs2/iD8kBm27MDBo3Kz/TMRFxgddD2eKPEZ8e6VE3nB3XE708Gql1HH2DGJbup5Lnc4Qj5+HUd8MhIt97iaMRy5QYFSpOQIHDEmFHmGmV/F9HqbdghH0MOBw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=QUiss1XC; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="QUiss1XC" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1777904666; x=1809440666; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=wGxs+F/+5Vrhuyz2y5uEWLeuFrAw1YPbFSMnjR0PIic=; b=QUiss1XCzPCTqtnXWs2xppdFpiFUoTul9UorOaSKshBl+m3csLnKdRn7 74UrkvPWXzUZmfcMX9AOYabINhUP8kN5Qr3TdpmwXQ8eC+c7uN3H0nJzE VbgmBQLKuCiDEDRbJ90rQ06X+jvfQBlPzRtrPugSudUF3t/msvFs/5h8x AximT0v1U5jIkYyCd4oBGuCjznNvWFpie713pPx9HsoJcdAVRbfSQV9oY x296c0HTrDJVLpJzgt+nmHQ/4hcneK05pPL757KhjRSLdIDQ/OHAn2TLN 5OSEbcEvjzEtyWcKhxfvTjlN/qbjWbAvnqAOQTb90u+b6EmC2v3crZml0 Q==; X-CSE-ConnectionGUID: 4MSG04KWTFi2g0cHazpwAg== X-CSE-MsgGUID: +y3hhGb+R46qJVvTtfL0+A== X-IronPort-AV: E=Sophos;i="6.23,215,1770620400"; d="scan'208";a="288370150" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 May 2026 07:24:25 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.87.71) by chn-vm-ex3.mchp-main.com (10.10.87.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.37; Mon, 4 May 2026 07:24:24 -0700 Received: from DEN-DL-M70577.microsemi.net (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 4 May 2026 07:24:20 -0700 From: Daniel Machon Date: Mon, 4 May 2026 16:23:26 +0200 Subject: [PATCH net-next v3 13/13] misc: lan966x-pci: dts: add fdma interrupt to overlay Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20260504-lan966x-pci-fdma-v3-13-a56f5740d870@microchip.com> References: <20260504-lan966x-pci-fdma-v3-0-a56f5740d870@microchip.com> In-Reply-To: <20260504-lan966x-pci-fdma-v3-0-a56f5740d870@microchip.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Steen Hegelund , , "Alexei Starovoitov" , Daniel Borkmann , "Jesper Dangaard Brouer" , John Fastabend , Stanislav Fomichev , Herve Codina , Arnd Bergmann , Greg Kroah-Hartman , Mohsin Bashir CC: , , , X-Mailer: b4 0.14.3 Add the fdma interrupt (OIC interrupt 14) to the lan966x PCI device tree overlay, enabling FDMA-based frame injection/extraction when the switch is connected over PCIe. Tested-by: Herve Codina Signed-off-by: Daniel Machon --- drivers/misc/lan966x_pci.dtso | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/misc/lan966x_pci.dtso b/drivers/misc/lan966x_pci.dtso index 7bb726550caf..5bb12dbc0843 100644 --- a/drivers/misc/lan966x_pci.dtso +++ b/drivers/misc/lan966x_pci.dtso @@ -141,8 +141,9 @@ switch: switch@e0000000 { interrupt-parent = <&oic>; interrupts = <12 IRQ_TYPE_LEVEL_HIGH>, + <14 IRQ_TYPE_LEVEL_HIGH>, <9 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "xtr", "ana"; + interrupt-names = "xtr", "fdma", "ana"; resets = <&reset 0>; reset-names = "switch"; -- 2.34.1