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From: mike.marciniszyn@gmail.com
To: Alexander Duyck <alexanderduyck@fb.com>,
	Jakub Kicinski <kuba@kernel.org>,
	kernel-team@meta.com, Andrew Lunn <andrew+netdev@lunn.ch>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Paolo Abeni <pabeni@redhat.com>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Russell King <linux@armlinux.org.uk>,
	Jacob Keller <jacob.e.keller@intel.com>,
	Mohsin Bashir <mohsin.bashr@gmail.com>,
	Simon Horman <horms@kernel.org>, Lee Trager <lee@trager.us>,
	Andrew Lunn <andrew@lunn.ch>
Cc: mike.marciniszyn@gmail.com, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH net-next v3 1/4] net: eth: fbnic: Fix addr validation in pcs write
Date: Mon,  4 May 2026 09:58:12 -0400	[thread overview]
Message-ID: <20260504135815.44226-2-mike.marciniszyn@gmail.com> (raw)
In-Reply-To: <20260504135815.44226-1-mike.marciniszyn@gmail.com>

From: "Mike Marciniszyn (Meta)" <mike.marciniszyn@gmail.com>

The DW IP has two distinct PCS address ranges cooresponding
to the C45 PCS registers.

The shim translates the PCS addr/regno into specific CSR writes
into one of those two zero-relative.

This patch fixes a one off in the test that could allow an invalid
CSR write if an addr == 2 was called.

This patch contains a fix for addr validation in fbnic_mdio_write_pcs()
to only return actual CSR reads for addr 0 and 1.

There are as of yet, no real impact for the bug as no PCS writes are
not yet present.

Signed-off-by: Mike Marciniszyn (Meta) <mike.marciniszyn@gmail.com>
---
v3:
  - put back into the series based on https://lore.kernel.org/all/9ec11642-8035-419c-a896-52f902020bb8@lunn.ch/
  - revised commit message will additional details
v2:
  - omitted from patch series
v1: https://lore.kernel.org/all/20260428172810.175077-2-mike.marciniszyn@gmail.com/

 drivers/net/ethernet/meta/fbnic/fbnic_mdio.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_mdio.c b/drivers/net/ethernet/meta/fbnic/fbnic_mdio.c
index 709041f7fc43..d6a124889f52 100644
--- a/drivers/net/ethernet/meta/fbnic/fbnic_mdio.c
+++ b/drivers/net/ethernet/meta/fbnic/fbnic_mdio.c
@@ -125,7 +125,7 @@ fbnic_mdio_write_pcs(struct fbnic_dev *fbd, int addr, int regnum, u16 val)
 		addr, regnum, val);
 
 	/* Allow access to both halves of PCS for 50R2 config */
-	if (addr > 2)
+	if (addr >= 2)
 		return;
 
 	/* Skip write for reserved registers */
-- 
2.43.0


  reply	other threads:[~2026-05-04 13:58 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-04 13:58 [PATCH net-next v3 0/4] irst series for xpcs based rsfec configuration mike.marciniszyn
2026-05-04 13:58 ` mike.marciniszyn [this message]
2026-05-04 13:58 ` [PATCH net-next v3 2/4] net: mdio: Add support for RSFEC Control register for PMA mike.marciniszyn
2026-05-04 13:58 ` [PATCH net-next v3 3/4] net: eth: fbnic: Consolidate register reads for ids and devs mike.marciniszyn
2026-05-04 13:58 ` [PATCH net-next v3 4/4] net: eth: fbnic: Add pma read and write access mike.marciniszyn
2026-05-05 12:50 ` [PATCH net-next v3 0/4] irst series for xpcs based rsfec configuration patchwork-bot+netdevbpf

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