[RFC PATCH 0/1] Proposal for in-band firmware update over PLDM-MCTP

[Badal Nilawar <badal.nilawar@intel.com>]

Problem statement: 

The CRI platform includes a dedicated I2C controller for in-band access to AMC.
AMC firmware updates leverage PLDM over MCTP, using the I2C controller as the
physical transport, enabled by the Linux kernel's MCTP-I2C driver
(drivers/net/mctp/mctp-i2c.c), which manages MCTP framing and delivery over the
I2C bus.

CRI Inband firmware update flow

        +-----------------------------------+
        |         User Space                |
        |	(PLDM requester/responder)  | 
        |   PLDM client via AF_MCTP socket  |
        +-----------------------------------+
                          |
        +-----------------------------------+
        |        net/mctp core              |
        |   (routing, EID resolution,       |
        |    MCTP framing)                  |
        +-----------------------------------+
                          |
        +-----------------------------------+
        |           mctp-i2c.c              |
        |   MCTP transport over i2c         |
        +-----------------------------------+
                          |
        +-----------------------------------+
        |          AMC Firmware             |
        |	(PLDM requester/responder)  | 
        |  MCTP Decode -> PLDM Processing   |
        +-----------------------------------+

Future GPU platforms may not include a dedicated I2C controller for MCTP
access; however, the requirement to support PLDM over MCTP persists. To
address this, a vendor-specific mailbox-based transport is proposed to
carry MCTP messages between the host and the GPU/AMC.

Solution:

The proposed approach involves implementing an MCTP transport layer with
binding type MCTP_PHYS_BINDING_VENDOR (0xFF) and incorporating it either
into the drivers/net/mctp/ directory or the drivers/gpu/drm/xe subsystem.
The latter is particularly fitting, as Xe is the exclusive consumer of
this functionality.


Option 1: MCTP Transport as Part of drivers/gpu/drm/xe Subsystem

Under this design, the Xe KMD takes sole ownership of the MCTP mailbox
transport layer. The implementation is introduced as a new source file,
xe-mctp-mailbox.c, placed within the drivers/gpu/drm/xe/ driver tree.

Although xe-mctp-mailbox.c resides within the Xe subsystem, it does not
operate in isolation from the broader networking stack. It integrates
with the standard Linux MCTP stack by registering an MCTP net device
via mctp_register_netdev(), allowing the net/mctp core to manage
routing, EID resolution, and MCTP framing in the usual way.
This means Xe retains direct ownership of the mailbox MMIO interface
(status, and data registers via BAR), while still participating as
transport in the MCTP network subsystem.


  +--------------------------------------------------+
  |                  User Space                      |
  |         (PLDM Requester / Responder)             |
  |       PLDM Client via AF_MCTP Socket             |
  +--------------------------------------------------+
                         |
                    AF_MCTP API
                         |
  +--------------------------------------------------+
  |              net/mctp Core                       |
  |    (Routing, EID Resolution, MCTP Framing)       |
  +--------------------------------------------------+
            |                        ^
            | mctp_register_netdev() | netdev / mctp_dev ops
            |   (called by Xe KMD)   |
  +--------------------------------------------------+
  | [NEW] drivers/gpu/drm/xe/xe-mctp-mailbox.c       |
  |                                                  |
  |   Owned by  : Xe KMD (drivers/gpu/drm/xe/)       |
  |   - Registers directly as MCTP net device        |
  |   - Implements MCTP transport over Mailbox MMIO  |
  +--------------------------------------------------+
                         |
           Direct MMIO access (BAR registers)
                         |
  +--------------------------------------------------+
  |         Intel Mailbox MMIO Registers             |
  |    (Doorbell, Status, Data Registers via BAR)    |
  +--------------------------------------------------+
                         |
              Hardware Mailbox Interface
                         |
  +--------------------------------------------------+
  |             GPU / AMC Firmware                   |
  |         (PLDM Requester / Responder)             |
  |   Mailbox Handler --> MCTP Decode                |
  |              --> PLDM Processing                 |
  +--------------------------------------------------+

Pros:
    + Tightly coupled with Xe and doesn't polute current generic mctp
      subsystem with vendor specific mailbox solution.
Cons:
    - Not a generic layer; cannot be easily reused or consumed
      by other drivers or subsystems outside of Xe.

RFC Patch: "xe/xe_mctp_mailbox: Add support for MCTP transport over mailbox"

Option 2: MCTP Transport as Part of net/mctp Subsystem

The MCTP mailbox driver (intel-mctp-mailbox.c) resides under
drivers/net/mctp/ and registers itself as an Auxiliary Bus Driver on the
Linux auxiliary bus. The Xe KMD is responsible for constructing an
Auxiliary Bus Device which encapsulates the mailbox ops and registering
it against the MCTP auxiliary bus driver. This binding allows the MCTP
layer to send and receive messages through the GPU mailbox interface.

  +--------------------------------------------------+
  |                  User Space                      |
  |         (PLDM Requester / Responder)             |
  |       PLDM Client via AF_MCTP Socket             |
  +--------------------------------------------------+
                         |
                    AF_MCTP API
                         |
  +--------------------------------------------------+
  |              net/mctp Core                       |
  |    (Routing, EID Resolution, MCTP Framing)       |
  +--------------------------------------------------+
                         |
              mctp_dev ops / netdev interface
                         |
  +--------------------------------------------------+
  | [NEW] drivers/net/mctp/intel-mctp-mailbox.c      |
  |                                                  |
  |   Registered as: Auxiliary Bus Driver            |
  |   - Binds to Auxiliary Device exposed by Xe KMD  |
  |   - Accesses mailbox ops shared via aux device   |
  +--------------------------------------------------+
       |                              |
       | auxiliary_driver_register()  | auxiliary_device_register()
       |                              |
  +--------------------+   +-------------------------+
  | Auxiliary Bus      |<->| Auxiliary Device        |
  | Driver             |   | (created by Xe KMD)     |
  | (intel-mctp-       |   | - Contains mailbox_ops  |
  |  mailbox.c)        |   |                         |
  | drivers/net/mctp/  |   |                         |
  +--------------------+   +-------------------------+
                         |
              mailbox_ops (send/recv via MMIO)
                         |
  +--------------------------------------------------+
  |         Intel Mailbox MMIO Registers             |
  |    (Status, Data Registers via BAR)              |
  +--------------------------------------------------+
                         |
              Hardware Mailbox Interface
                         |
  +--------------------------------------------------+
  |             GPU / AMC Firmware                   |
  |       (PLDM Requester / Responder)               |
  |   Mailbox Handler --> MCTP Decode                |
  |       --> PLDM Processing                        |
  +--------------------------------------------------+


Pros:
    + Natively part of the MCTP stack.
    + Consistent with existing MCTP transport implementations
      such as mctp-i2c and mctp-i3c. Probe occurs naturally
      when the auxiliary device is created, following standard
      kernel device model patterns.
Cons:
    - Introduction of vendor specific cases along with current
      generic mctp entries

	
Open for other ideas and suggestions.

Note: This RFC is prepared with AI assistance (e.g. GitHub Copilot etc).

Badal Nilawar (1):
  xe/xe_mctp_mailbox: Add support for MCTP transport over mailbox

 drivers/gpu/drm/xe/Makefile          |   1 +
 drivers/gpu/drm/xe/xe_device.c       |   3 +
 drivers/gpu/drm/xe/xe_device_types.h |   4 +
 drivers/gpu/drm/xe/xe_mctp_mailbox.c | 186 +++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_mctp_mailbox.h |  14 ++
 5 files changed, 208 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_mctp_mailbox.c
 create mode 100644 drivers/gpu/drm/xe/xe_mctp_mailbox.h

-- 
2.54.0